Current source circuit

A current source circuit having a first, second, third and fourth field effect transistor (T1, T2, T3, T4), where said first and second field effect transistors (T1, T2) are of a first channel type and said third and fourth field effect transistors (T3, T4) of a second channel type and the series-connected channel sections of said first and fourth field effect transistors and of said second and third field effect transistors (T1, T4;

• T2, T3) form a first and second main current path (1, 2) respectively, where the control electrodes of said first and third field effect transistors (T1, T3) are connected respectively to said first main current path (1) and the control electrode of said second field effect transistor (T2), and to said second main current path (2) and the control electrode of said fourth field effect transistor (T4) in order to form a first and second current mirror respectively, and where a fifth field effect transistor (T5) is controlled by said first current mirror (T1, T2) to tap a first source current (i3), wherein a first pair of field effect transistors (T6, T7) is provided, said first pair of field effect transistors (T6, T7) being connected in series in said first main circuit (1) between said fourth field effect transistor (T4) of said second current mirror (T3, T4) and an operating voltage source (V.sub.DD), wherein a first capacitor (Cl) is connected parallel with channel section of that field effect transistor (T6) of said first field effect transistor pair (T6, T7) which is connected to said operating voltage source (V.sub.DD), wherein a second capacitor (C2) connects the connected control electrodes of said first and second field effect transistors (T1, T2) to the reference potential of the circuit, and wherein the control electrodes of said field effect transistors (T6, T7) of said first field effect transistor pair are supplied with clock signals (C11, C12) in phase opposition.