Partial isolation of power rails for output buffer circuits
AssigneeNational Semiconductor Corporation
InventorsJames R. Ohannes, Stephen W. Clukey, E. David Haacke, Roy L. Yarbrough
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AssigneeNational Semiconductor Corporation
InventorsJames R. Ohannes, Stephen W. Clukey, E. David Haacke, Roy L. Yarbrough
Estimating the term…
An output buffer circuit (10) delivers output signals of high and low potential levels at an output (V.sub.OUT) in response to data signals at an input (V.sub.IN). The output buffer circuit comprises an input stage (12) coupled between a relatively quiet power supply rail (V.sub.CCQ) and a relatively quiet power ground rail (GNDQ), and an output stage (14) coupled between a relatively noisy power supply rail (V.sub.CCN) and a relatively noisy power ground rail (GNDN). A first coupling resistor (R5) is coupled between the relatively quiet and noisy supply rails (V.sub.CCQ, V.sub.CCN) for reducing V.sub.CC droop in the relatively noisy supply rail (V.sub.CCN) which in turn reduces output step in voltage during transition from low to high potential level (LH) at the output (V.sub.OUT). A second coupling resistor (R5A) is coupled between the relatively quiet and noisy ground rails (GNDQ,GNDN). The coupling resistors (R5 and R5A) have low resistance values selected for partially coupling the supply and ground rails respectively, while maintaining partial isolation for protecting input dynamic threshold levels of quiet outputs. The first coupling resistor (R5) is coupled between supply rail bond pads (20,22), while the second coupling resistor (R5A) is coupled between ground rail bond pads (30,32). The power rail bond pads (20,22) (30,32) are coupled respectively to split leads (24,25) (34,35) of a split lead leadframe merging respectively to a common V.sub.CC pin (28) and a common GND pin (38).
A power rail coupling for an output buffer circuit having an output coupled to a common bus with other output buffer circuits, said output buffer circuit having relatively quiet and relatively noisy power supply rails coupled respectively to input and output stages of the output buffer circuit comprising:
An output buffer circuit for delivering output signals of high and low potential levels at an output in response to data signals at an input, said output buffer circuit comprising an input stage coupled between a relatively quiet power supply rail and a relatively quiet power ground rail, and an output stage coupled between a relatively noisy power supply rail and a relatively noisy power ground rail, the improvement for reducing droop in the relatively noisy supply rail for reducing output step in voltage during transition from low to high potential level at the output comprising:
A power rail coupling for an output buffer circuit having an output coupled to a common bus with other output buffer circuits, said output buffer circuit having relatively quiet and relatively noisy power ground rails coupled respectively to input and output stages of the output buffer circuit comprising:
An output buffer circuit for delivering output signals of high and low potential levels at an output in response to data signals at an input, said output buffer circuit comprising an input stage coupled between a relatively quiet power supply rail and a relatively quiet power ground rail, and an output stage coupled between a relatively noisy power supply rail and a relatively noisy power ground rail, the improvement for reducing droop in the relatively noisy supply rail for reducing output step in voltage during transition from low to high potential level at the output comprising:
Dependencies are inferred from the claim text.