Semiconductor stacked device

A semiconductor stacked device comprising:

• a first semiconductor chip and a second semiconductor chip, each having a main surface, a plurality of electrodes formed on said main surfaces;
• a first means for mounting said first semiconductor chip thereon having a first surface, a second surface and a third surface which is positioned between said first and second surfaces;
• a second means for mounting said second semiconductor chip thereon having a first surface, a second surface an a third surface which is positioned between said first and second surfaces;
• a plurality of pairs of conductors each formed on said first and second surfaces of each of said first and second mounting means, means for electrically connecting the conductors of each pair to one another;
• a plurality of first leads electrically connecting respective ones of said electrodes of said first and second semiconductor chips to corresponding said conductors formed on said first surfaces of said first and second mounting means;
• a second lead spaced from said first leads and electrically connecting another one of said electrodes of said first semiconductor chip and one of said conductors of said first mounting means;
• and
• a third lead spaced from said first leads and electrically connecting another one of said electrodes of said second semiconductor chip and one of said conductors of said second mounting means,
• wherein said first leads of said first and second semiconductor chips are electrically connected with each other, said second lead provides a signal for selecting said first semiconductor chip and said third lead provides a signal for selecting said second semiconductor chip.