Circuit and method for performing integer power operations

A method for performing an integer power operation in an arithmetic circuit having a first register, a second register, a multiplier circuit with a third register, said method comprising the steps of:

• (1) storing exponent data in said first register;
• (2) storing base data in said second register;
• (3) iteratively shifting first register data;
• (4) for each iteration,
• (A) selectively multiplying, according to data shifting from said first register, said second register data by said third register data storing results in the third register, and
• (B) multiplying said second register data by itself storing results in said second register;
• and
• (5) providing a completion signal when remaining data in said first register indicates integer power operation completion.

An arithmetic circuit for performing an integer power arithmetic operation comprising:

• first register means for storing exponent data;
• second register means for storing base data;
• multiplying means for multiplying said base data in said second register by a third register and maintaining an accumulative results in said third register;
• and
• control means for accumulating selective base data multiplications in said multiplying means according to data shifted from said first register means and providing a completion signal when the first register means data is in a null state.