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US 5,184,208 AGranted
Semiconductor device
AssigneeHitachi, Ltd.
InventorsToshiyuki Sakuta, Kazuyuki Miyazawa, Satoshi Oguchi, Aizo Kaneda, Masao Mitani, Shozo Nakamura, Kunihiko Nishi, Gen Murakami
Life of this patent
Estimating the term…
Abstract
A semiconductor device is provided in connection with a semiconductor chip which has a plurality of bonding pads at a part corresponding to a centrally located area of the front or first main surface thereof, an organic insulator film which overlies the semiconductor chip and which has an opening in correspondence with the bonding pads, a plurality of leads which overly the organic insulator film, and a molding resin with which these constituents are sealed or packaged.
Claims34
A semiconductor memory device comprising:
- rectangular shaped semiconductor chip having a main surface and including a first pair of end sides that are relatively longer than a second pair thereof;
- two rectangular shaped memory cell array regions formed on said main surface and arranged apart from each other, wherein each memory cell array region has one pair of longer end sides are directioned in parallel to the longer end sides of the chip;
- two separate, peripheral circuit regions formed between said memory cell array regions on said main surface, wherein said two peripheral circuit regions are arranged in parallel with each other and each is extended adjacently along a relatively shorter end side of a respective one of said two rectangular shaped memory cell array regions;
- a plurality of bonding pads formed between said peripheral circuit regions, at a portion of said main surface away from an outer peripheral area thereof, and arranged along the direction of the shorter end sides of said memory cell array regions, wherein each one of said two peripheral circuit regions is formed between said plurality of bonding pads, in proximity thereto, and a respective one of said memory cell array regions;
- a plurality of leads, wherein each lead has an inner lead portion and an exposed outer lead portion extending outwardly from said inner lead portion, and wherein said inner lead portion has a front end part overlying said main surface of said semiconductor chip;
- an insulating film interposed between the front end parts of said inner lead portions of said plurality of leads and the main surface of said semiconductor chip, wherein aid insulating film is contacting the front end parts of said inner lead portions and the main surface of said semiconductor chip;
- means for electrically connecting the front end parts of said inner lead portions with said bonding pads, respectively;
- and
- a molding resin for molding said semiconductor chip, the inner lead portions of said plurality of leads and said insulating film.
6 more elements
A semiconductor memory device comprising:
- a rectangular shaped semiconductor chip having a main surface and including a first pair of end sides that are relatively longer than a second pair thereof;
- two rectangular shaped memory cell array regions formed on said main surface and arranged apart from each other, wherein each memory cell array region has one pair of end sides longer than another pair thereof, the pair of longer end sides are directioned in parallel to the longer end sides of the chip;
- two separate, peripheral circuit regions formed between said memory cell array regions on said main surface, wherein said two peripheral circuit regions are arranged in parallel with each other and each is extended adjacently along a relatively shorter end side of a respective one of said two rectangular shaped memory cell array regions;
- a plurality of bonding pads formed between said peripheral circuit regions, at a portion of said main surface away from an outer peripheral area thereof, and arranged along the direction of the shorter end sides of said memory cell array regions, wherein each one of said two peripheral circuit regions is formed between said plurality of bonding pads, in proximity thereto, and a respective one of said memory cell array regions;
- a plurality of leads, wherein each lead has an inner lead portion and an exposed outer lead portion extending outwardly from said inner lead portion, and wherein said inner lead portion has a front end part overlying said main surface of said semiconductor chip;
- a first insulating film interposed between the front end parts of said inner lead portions of said plurality of leads and the main surface of said semiconductor chip, wherein said first insulating film overlies the main surface of said semiconductor chip and is in contact with the front end parts of said inner lead portions;
- means for electrically connecting the front end parts of said inner lead portions with said bonding pads, respectively;
- and
- a molding resin for molding said semiconductor chip, the inner lead portions of said plurality of leads and said insulating film.
6 more elements
A semiconductor memory device comprising:
- a rectangular shaped semiconductor chip having a main surface and including a first pair of end sides that are relatively longer than a second pair thereof;
- two rectangular shaped memory cell array regions formed on said main surface and arranged apart from each other, wherein each memory cell array region has one pair of end sides longer than another thereof, the pair of longer end sides are directioned in parallel to the longer end sides of said semiconductor chip;
- a peripheral circuit region formed between said memory cell array regions on said main surface, wherein said peripheral circuit region is extended in a direction along the relatively shorter end sides of said memory cell array regions;
- a plurality of bonding pads formed between each one of said memory cell array regions and said peripheral circuit region, at a portion of said main surface substantially away from an outer peripheral area thereof, thereby effecting an arrangement of said plurality of bonding pads and said peripheral circuit region, in proximity thereto, between opposing relatively shorter end sides of said memory cell array regions;
- a plurality of leads, wherein each lead has an inner lead portion and an exposed outer lead portion extending outwardly from said inner lead portion, and wherein said inner lead portion has a front end part overlying the main surface of said semiconductor chip;
- an insulating film interposed between the front end parts of said dinner lead portion of said plurality of leads and the main surface of said semiconductor chip, wherein said insulating film is contacting the front end parts of said inner lead portions and said main surface of said semiconductor chip;
- means for electrically connecting the front end parts of said inner lead portions with said bonding pads, respectively;
- and
- a molding resin for molding said semiconductor chip, the inner lead portions of said plurality of leads and said insulating film.
6 more elements
A semiconductor memory device comprising:
- a rectangular shaped semiconductor chip having a main surface and including a first pair of end sides that are relatively longer than a second pair thereof;
- two rectangular shaped memory cell array regions formed on said main surface and arranged apart from each other, wherein each memory cell array region has one pair of end sides longer than another thereof, the pair of longer end sides are directioned in parallel to the longer end sides of said semiconductor chip;
- a peripheral circuit region formed between said memory cell array regions on said main surface, wherein said peripheral circuit regions is extended in a direction along the relatively shorter end sides of said memory cell array regions;
- a plurality of bonding pads formed between each one of said memory cell array regions and said peripheral circuit region, at a portion of said main surface away from an outer peripheral area thereof, thereby effecting an arrangement of said plurality of bonding pads and said peripheral circuit region, in proximity thereto, between opposing relatively shorter end sides of said memory cell array regions;
- a plurality of leads, wherein each lead has an inner lead portion and an exposed outer lead portion extending outwardly from said inner lead portion, and wherein aid inner lead portion has a front end part overlying the main surface of said semiconductor chip;
- a first insulating film interposed between the front end parts of said inner lead portions of said plurality of leads and the main surface of said semiconductor chip, wherein said first insulating film overlies the main surface of said semiconductor chip and is contacting the front end parts of said inner lead portions;
- means for electrically connecting the front end parts of said inner lead portions with said bonding pads, respectively;
- and
- a molding resin for molding said semiconductor chip, the inner lead portions of said plurality of leads and said insulating film.
6 more elements
A semiconductor memory device according to claim 50, wherein said second insulating film is a passivation film interposed between said first insulating film and the main surface of said semiconductor chip.
Dependencies are inferred from the claim text.