Controlled-gain transistor amplifier without D-C shift or signal phase reversal in load current

A controlled-gain transistor amplifier with constant quiescent load current despite change in gain responsive to a control signal voltage, said controlled-gain transistor amplifier including:

• first, second, third, fourth, fifth and sixth transistors, each having a base electrode, an emitter electrode and a collector electrode;
• means for connecting said first and second transistors as a first emitter-coupled differential amplifier including
• means for applying an input signal voltage between the base electrodes of said first and second transistors;
• means for connecting said third and fourth transistors as a first current splitter, including
• an interconnection between the emitter electrodes of said third and fourth transistors to which the collector electrode of said first transistor connects, and including
• means for applying said control signal voltage between the base electrodes of said third and fourth transistors;
• means for connecting said fifth and sixth transistors as a second current splitter, including
• an interconnection between the emitter electrodes of said fifth and sixth transistors to which the collector electrode of said second transistor connects, and including
• means for applying said control signal voltage between the base electrodes of said fifth and sixth transistors;
• means for applying an operating potential to a first interconnection, which is between the collector electrodes of said third and sixth transistors, and
• means for applying an operating potential to a second interconnection, which is between the collector electrodes of said fourth and fifth transistors, at least one of which means for applying an operating potential includes
• an output load;
• and
• the improvement comprising:
• seventh and eighth transistors, each having a base electrode, and emitter electrode and a collector electrode;
• and
• means for connecting said seventh and eighth transistors as a second emitter-coupled differential amplifier, including
• means for applying said input signal voltage between the base electrodes of said seventh and eighth transistors, and including
• means for connecting the collector electrodes of said seventh and eighth transistors to separate ones of said first and second connections.