US 5,184,034 A · State-dependent discharge path circuit

Abstract

A circuit for use in connection with tristate output buffers in order to provide concurrently for fast discharge of the output pulldown transistor base and at the same time for building in protection against reverse breakdown in the pulldown transistor. The innovation consists of providing a two discharge paths to ground for the base of the output pullup transistor. A low-capacitance path is activated only while the output buffer is in its active mode. In the preferred embodiment of the invention, this low discharge path consists of two CMOS transistors in series, one of which is controlled by the enable signal input E of the buffer circuit and the other by the data signal input V.sub.IN of the buffer circuit. The other path to ground is available whenever the data signal input V.sub.IN is low, regardless of whether the buffer is in its active or inactive mode. This other path provides discharge protection for the base of the pullup transistor for the buffer in its inactive mode, and has incorporated into it reverse breakdown protection in the form of voltage drop devices such as forward-biased diodes.

Claims10

Dependent claims

A state-dependent-discharge-path circuit for discharging a control node of an output pullup transistor of a tristate output buffer, where said tristate output buffer comprises a data signal input and an enable signal input, wherein said data signal input is coupled to a pullup-predriver-inverter-stage, wherein said state-dependent discharge path comprises a first ground link and a second ground link wherein first ground link is coupled between said control node and a low potential power rail and comprises

(a) a first discharge transistor controlled by output of said pullup-predriver-inverter-stage and coupled in series with
(b) a breakdown-protection-voltage-drop device, and wherein said second ground link is coupled between said base node and ground and comprises
(a) a second discharge transistor controlled by output of said pullup predriver inverter stage and coupled in series with
(b) a discharge enable transistor which is controlled directly by said enable signal input.

1 more element

A BiCMOS tristate output buffer circuit having an active mode of operation for delivering output signals of high and low potential levels at an output V.sub.OUT in response to data signals at a data signal input V.sub.IN and an inactive mode of operation providing a high impedance third state at said output V.sub.OUT, comprising

a bipolar output pullup transistor Q22 for sourcing current to said output V.sub.OUT from a high potential power rail V.sub.CCN,
a CMOS pullup predriver circuit coupled to said pullup transistor Q22,
a base node of said pullup transistor Q22 coupled to a quiet low potential power rail GNDQ through a first discharge path in parallel with a second discharge path, wherein said first discharge path comprises breakdown-protection-voltage-drop device and said second discharge path constitutes a low-capacitance circuit lacking said voltage-drop device, wherein said second discharge path comprises
(a) a discharge transistor Q23 with primary current path between said base node of said pullup transistor Q22 and
(b) a discharge enable transistor Q26 with primary current path between said discharge transistor Q23 and said low potential power rail GNDQ,
(c) discharge turnon means for ensuring that said discharge transistor Q23 is conducting only if a low potential signal is applied to said input V.sub.IN, and
(d) discharge enabling means for ensuring that said discharge enable transistor Q26 is conducting if and only if said BiCMOS tristate output buffer circuit is in its active mode of operation.

4 more elements

Dependencies are inferred from the claim text.

State-dependent discharge path circuit

Life of this patent

State-dependent discharge path circuit

Life of this patent

Abstract

Claims10