Glitch reduction in integrated circuits, systems and methods
AssigneeTexas Instruments Incorporated
InventorJerald G. Leach
Life of this patent
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Abstract
An integrated circuit has a clock input pad and circuitry operative in response to a clock signal. Clock transitions at the clock input pad are potentially subject to glitches due to noise and ringing. Further provided is a glitch remover circuit having a logic gate having first and second inputs. The glitch remover circuit has a series of circuits coupled to the clock input pad with differing delays for positive edges than for negative edges. The series of circuits has an output connected to the first input of the logic gate, with the second input coupled to the series of circuits intermediately. Other devices, systems and methods are also disclosed.
Claims16
An integrated circuit having a clock input pad and comprising:
- a. circuitry operative in response to a clock signal having transitions, said clock transitions at said clock input pad being potentially subject to glitches;
- and
- b. a glitch remover circuit having a logic gate having first and second inputs, said glitch remover circuit having a series of circuits coupled between said clock input pad and said first input, each one of said series of circuits having differing delays for positive signal edges than for negative signal edges, said second input coupled to the input of one of said series of circuits.
An integrated circuit having:
- (a) a clock input,
- (b) a one-shot circuit fed from said clock input, and
- (c) functional circuitry clocked by said one-shot circuit filtering out glitches in said clock input;
- (d) wherein said one-shot circuit comprises a plurality of circuits connected in series, each circuit of said plurality of circuits having a threshold different form the immediately prior and immediately succeeding circuits, said immediately prior and immediately succeeding circuits having substantially the same threshold and a logic gate with a first input fed by said series of circuits and a second input connected to an input of one of said series of circuits and an output and a clamp circuit controlled by the output of said logic gate, said clamp circuit connected to said second input.
A method of filtering clock glitches in an integrated circuit comprising the step of:
- (a) providing an integrated circuit having a one-shot;
- and
- (b) internally initiating a one-shot clock signal from said one-shot in said integrated circuit in response to a clock pulse externally supplied to the integrated circuit;
- (c) further comprising the step of internally cascading said clock pulse through circuits which make the clock pulse propagate slower when transitioning in one sense than when it transitions in the opposite sense.
An integrated circuit having a clock input pad and comprising:
- (a) circuitry operative in response to a clock signal having transitions, said clock transitions at the clock input pad being potentially subject to glitches;
- and
- (b) a glitch remover circuit having a logic gate having first and second inputs, said glitch remover circuit having a series of circuits coupled between said clock input pad and said first input alternate ones of said series of circuits having alternately higher and lower beta values, the series of circuits having an output connected to said first input of said logic gate, said second input coupled to an input of one of said series of circuits.
An integrated circuit having a clock input pad and comprising:
- (a) functional circuitry operative in response to a clock signal having clock transitions, said clock transitions at said clock input pad being potentially subject to glitches;
- (b) a glitch remover circuit having a series of circuits coupled to said clock input pad;
- and
- (c) a clamp connected between one of said circuits and a voltage source and having an input coupled to another of said circuits, the series of circuits having an output connected to supply a signal as the clock signal to the functional circuitry.
Dependencies are inferred from the claim text.