US 5,184,027 AGranted

Clock signal supply system

AssigneeHitachi, Ltd.

InventorsNoboru Masuda, Ryotaro Kamikawai, Masayoshi Yagyu, Masakazu Yamamoto, Hiroyuki Itoh, Tatsuya Saito

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Abstract

A clock signal supply system provides for automatic accurate phase adjustment of clock signals. The system includes an oscillator that produces clock signals and a reference generator that generates a reference signal that has a predetermined relationship with respect to the clock signals produced by the oscillator. At each location where the clock signal is to be received, an adjusting circuit is provided to adjust the phase of the received clock signals. Such an adjusting circuit may include a variable delay circuit which receives the clock signal and produces an output which is constituted by the clock signal having a varied delay, to the remainder of the attached circuits. Further, the output of the variable delay is fed back to a phase difference detection circuit. The reference signal is second input to the phase difference detection circuit. This phase difference detection circuit compares the difference of the reference signal and the output of the variable delay circuit and produces the control signal to the variable delay circuit which will further adjust the phase of the clock signal that is received. This adjustment is carried out at each of the locations where the clock signal is to be received, thereby providing automatic adjustment of the phase of the clock signals.

Claims21

Dependent claims

A clock signal supply system comprising:

a clock signal oscillator producing a clock signal;
a plurality of first means for receiving said clock signal applied thereto, said clock signal having an associated phase, and each of said first means further including means for adjusting the phase of the clock signal and producing an output of phase-adjusted clock signals from the received clock signal;
a plurality of first signal lines for transmitting the clock signals produced from the clock signal oscillator to each of the first means;
second means for generating a reference signal in predetermined relationship wit the clock signals produced from the clock signal oscillator, said second means including a first reference signal circuit and a second reference signal circuit;
a pair of second signal lines connecting said first and second reference signal circuits to each of said first means and to each other, and transmitting the reference signal from the second means to each of the first means, said second means generating the reference signal in either of a first or second direction along one of said pair of second signal lines between said first and second reference signal circuits;
wherein each of said first means includes means for comparing said phase-adjusted clock signal produced form the clock signal received through an associated first signal line, with the reference signal transmitted by said one of the second signal lines, and means for adjusting the phase of the clock signal received through the first signal lie into a predetermined phase relationship with the reference signal based on the results of the comparison by said means or comparing;
further wherein a first signal produced by said first reference signal circuit is transmitted along a first one of said pair of second signal lines in a first direction, and a second signal produced by said second reference signal circuit is transmitted in a second direction, opposite to the first direction, along the other of said pair of second signal lines;
and
wherein said means for comparing compares said phase-adjusted clock signal that is produced from the clock signal received through the first signal line with said first signal received through said first one of said pair of second signal lines, and compares said phase-adjusted clock signal produced from the clock signal received through the first signal line with said second signal received through the second one of said pair of second signal lines, thereby to adjust the phase of the clock signal in such a manner to attain a predetermined phase relationship between the clock signal received through said first signal line and said first and second signals received through said pair of second signal lines respectively.

6 more elements

A clock signal supply system used in a computer system having a plurality of destination blocks which are destinations of a supplied clock signal, comprising:

means for generating a plurality of clock signals having phase different from each other;
a first signal line transmitting one of said clock signals from said means for generating to each of the blocks;
means for successively generating a select signal alternately designating one of said clock signals;
a second signal line transmitting said select signal form said select signal generating means to each of the blocks;
means, responsive to said select signal, for generating a reference signal, said reference signal being a phase reference of the clock signal designated by said select signal;
a third signal line transmitting said reference signal from said reference signal generating means to each of the blocks;
and
a plurality of means one disposed in each of the blocks, for reproducing the plurality of clock signals having difference phases on the basis of the clock signal transmitted through said first signal line in accordance with the select signal transmitted through said second signal line and the reference signal transmitted through said third signal line.

5 more elements

A clock signal supply system used in a computer system having a plurality of destination blocks which are destinations of a supplied clock signal, comprising:

means for generating a plurality of clock signal shaving phases difference from each other;
a plurality of first signals lines for transmitting said clock signals from said clock signal generating means to each of said blocks;
means for successively generating a select signal alternately designating one of said clock signals;
a second signal line for transmitting said select signal from said select signal generating means to each of said blocks;
means for generating a reference signal on the basis of one of said clock signals, said reference signal being a phase reference of the clock signal designated by said select signal;
a third signal line transmitting said reference signal from said reference signal generating means to said one of said blocks;
and
means, disposed in said one of said blocks for receiving the plurality of clock signals transmitted through said plurality of first signal lines and adjusting the phases of said plurality of clock signals in accordance with select signals transmitted through said plurality of second signal lines and the reference signal transmitted through said third signal line to provide phase adjusted clock signals.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 07/688,696Filed 22 Apr 1991 · continuation
Priority: JP 62-6378220 Mar 1987
Granted: 2 Feb 1993
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

C04B 35/4504
Based on copper oxide or solid solutions thereof with other oxides: containing rare earth oxides
G06F 1/10
Generating or distributing clock signals or signals derived directly therefrom: distribution of clock signals , e.g. skew
H10N 60/0268
Manufacture or treatment: of devices comprising copper oxide
H10N 60/857
Ceramic superconductors: comprising copper oxide