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US 5,183,800 AGranted
Interconnection method for semiconductor device comprising a high-temperature superconductive material
AssigneeSharp Kabushiki Kaisha
InventorYasuhito Nakagawa
Life of this patent
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Abstract
An interconnecting method for a semiconductor device which includes the steps of depositing a high-temperature superconductive material over an interlevel insulation layer, and irradiating an energy beam onto a high-temperature superconductive material layer thus formed by the above step so as to effect anneal treatment.
Claims8
An interconnection method for a semiconductor device comprising the steps of:
- depositing an interlevel insulation layer of predetermined thickness over a semiconductor substrate formed with a first level metal on a surface and active elements in a lower semiconductor layer;
- forming through-holes through the interlevel insulation layer for connecting the first level metal with a second level interconnection;
- depositing a metallic material within the through-holes;
- depositing a high-temperature superconductive material over the surface of the interlevel insulation layer and the metallic material;
- heat-treating the surface of the high-temperature superconductive material thus deposited over the interlevel insulation layer by laser annealing for imparting thereto superconductive characteristics and simultaneous alignment of crystal orientation;
- and
- removing unnecessary portions of the high-temperature superconductive material by etching,
- said step of depositing an interlevel insulation layer protecting the active elements from thermal damage caused by said step of heat treating by laser annealing.
5 more elements
An interconnection method for a semiconductor device comprising the steps of:
- forming active elements in a lower layer of a substrate of the semiconductor device;
- depositing a first metal layer on a surface of the substrate;
- depositing an interlevel insulation layer over the surface of the substrate;
- depositing a high-temperature superconductive material over the surface of the interlevel insulation layer;
- forming through-holes through the interlevel insulation layer and the high-temperature superconductive material;
- depositing a metallic material into the through-holes for connecting said first metal layer with the high-temperature superconductive material;
- superconduction occurring in a horizontal direction between the metallic material in the through-holes and the high-temperature superconductive material;
- irradiating an energy beam over the surface of the high-temperature superconductive material to effect an anneal treatment, the interlevel insulation layer protecting the active elements from thermal damage caused by said step of irradiating;
- and
- removing unnecessary portions of the irradiated high-temperature superconductive material.
7 more elements
An interconnection method for a semiconductor device comprising the steps of:
- forming active elements in a lower layer of a substrate of the semiconductor device;
- depositing an interlevel insulation layer over the surface of the substrate;
- depositing a superconductive layer of relatively low critical temperature and increased resistance over the surface of the interlevel insulation layer;
- depositing a relatively high-temperature superconductive material over the surface of the superconductive layer of relatively low critical temperature;
- the low critical temperature superconductive layer facilitating crystallization of said high-temperature superconductive layer during a subsequent anneal treatment;
- irradiating an energy beam over the surface of the high-temperature superconductive material to effect said anneal treatment, the interlevel insulation layer protecting the active elements from thermal damage caused by said step of irradiating;
- and
- removing unnecessary portions of the irradiated high-temperature superconductive material.
5 more elements
A method of forming a superconductor integrated circuit comprising the steps of:
- forming active elements on a lower portion of a substrate of the semiconductor integrated circuit;
- depositing first level metals on a surface of the substrate, the first level metals serving as intermediate contacts of the active elements;
- depositing an interlevel insulation layer over the surface of the substrate including the first level metals;
- filling the through-holes with a metallic material;
- depositing a high-temperature superconductive material over the surface of the interlevel insulation layer and the metallic material;
- irradiating an energy beam over the surface of the high-temperature superconductive material to effect an anneal treatment, the interlevel insulation layer protecting the active elements from thermal damage caused by the step of irradiating;
- and
- removing unnecessary portions of the irradiated high-temperature superconductive material.
5 more elements
Dependencies are inferred from the claim text.