Multiple material processing system start-up

A material processing system comprising a plurality of peripheral modules and base module, said base module including a central processor, each of said peripheral modules including a peripheral processor,

• a multidrop data bus which functions to provide direct bidirectional communication between said base module central processor and each of said peripheral processors,
• a serial data link which functions to provide point-to-point communication between modules, interconnecting each of said central and peripheral processors in a serial manner, whereby said point-to-point communication on said data link maximizes the speed of information exchanged and thus the speed of operation of said material processing system,
• said central processor including means for providing a system command signal along said serial link to the first of said peripheral processors,
• each said peripheral processor including means responsive to said system command signal for adding thereto a tag, said tag including data representative of the address and configuration of said processor, and means for passing said system command signal to the next successive processor, wherein the last of said peripheral processors passes said system command signal and tags appended thereto to said base module central processor,
• said base module central processor including storage means for storing the address and designation data of each said module.

A method for material processing comprising the steps of:

• providing a serial data link interconnecting in a serial manner a central processor for a base module and a plurality of peripheral processors in respective peripheral modules,
• providing means for generating a system command signal along said serial link to the first of said peripheral module processors,
• providing in each peripheral processor means responsive to said system command signal for adding thereto a tag, said tag including data representative of the address and configuration of said processor, and for passing said system command signal to the next successive module processor, wherein the last of said peripheral processors passes said system command signal and tags appended to said base module central processor,
• providing said base module central processor with storage means for storing the address and designation data of each said peripheral module.