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US 5,182,561 AGranted
Integrated converter with gate for supplying integrating dock pulses to counters only during reference signal integrating period
AssigneeSony Corporation
InventorTadao Sasaki
Life of this patent
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Abstract
An integrated A/D converter includes an integrator 8integrating reference signals in synchronism with an integration start signal, and counters for counting integrating clock pulses until the integrated value of the integrator reaches a value corresponding to an input signal, thereby to convert the input signal into a digital or analog signal based on the counts of the counters. An AND gate supplies the integrating clock pulses to the counters only during a predetermined period in synchronism with the integration start signal, so that the integrating clock pulses are supplied to the counters only during an integrating period for the reference signals.
Claims7
An integrated converter comprising:
- input means for receiving an input signal;
- an integrated A/D converter means for converting said input signal to an output signal outputted from an output means of said A/D converter means in response to an integrating clock signal, an output clock signal, and an integration start signal, each of which is derived from a system clock signal, said converter means including:
- integrating means for integrating said input signal from said input means to provide an integrated input signal,
- a plurality of comparators, having their outputs connected to a clock signal selector for comparing said integrated input signal to a first source of reference signals,
- a second source of reference signals respectively supplied to said integrating means and controlled by said clock signal selector,
- a plurality of counters in circuit with said clock signal selector,
- and an output shift register connected to said counters and in circuit with said output means;
- wherein said integrating means integrates said reference signals under the control of said clock signal selector and in synchronism with said integration start signal;
- said plurality of counters counts pulses of said integrating clock until the integrated value of said integrating means reaches a value corresponding to said input signal, thereby to convert said input signal into said output signal based on the count of said plurality of counters;
- and
- said integrated converter further comprising a gate for gating said integrating clock pulses to supply the integrating clock pulses to said plurality of counters only during a predetermined period in synchronism with said integration start signal, so that said integrating clock pulses are supplied to said plurality of counters only during an integrating period for said second source of reference signals.
8 more elements
An integrated converter, comprising:
- a system clock means for supplying a system clock pulse at a predetermined frequency;
- an integrating clock signal derived form said system clock pulse for controlling a conversion of an input signal to a converted output signal and for providing integrating clock pulses to a converted signal counter for integrating reference signals provided to said converted signal counter, said converted signal counter counting said integrating clock pulses until the integrated value of the reference signals reaches a value corresponding to said input signal, thereby to convert said input signal into a converted signal based on the count of said converted signal counter;
- an output clock signal for controlling the output from said converted signal counter to provide said converted output signal,
- an integration start signal derived from said system clock means for initiating conversion of said input signal through a control circuit, and for integrating said reference signals in synchronism with said integration start signal;
- and
- gate means for gating said integrating clock signal to supply said integrating clock signal to said converted signal counter only during a predetermined portion of a converting period initiated by said integration start signal and inhibiting providing said integrating clock signal to said converted signal counter during the remainder of said converting period.
3 more elements
Dependencies are inferred from the claim text.