Cathode clamping circuit apparatus with digital control

A cathode clamping circuit apparatus with digital control comprising:

• first variable voltage generation means for generating a first dc voltage with respect to the ground in accordance with manual operation;
• and
• a plurality of cathode clamping circuits for producing dc component voltages and for clamping said color component signals with said dc component voltage respectively, each of said cathode clamping circuits having;
• a first capacitor whose one end is supplied with one of said color component signals for coupling a color component signal to an output terminal;
• a first resistor whose one end is connected to said output terminal and whose other end is supplied with a dc supply voltage;
• a transistor having a collector connected to said output terminal, a base supplied with a clamp pulse produced from said color component signals and synchronizing signals accompanied with said color component signals;
• a second capacitor whose one end is connected to an emitter of the transistor and whose other end is connected to the ground;
• a shunt regulator for generating a second dc voltage in accordance with a current signal, said shunt regulator having:
• a cathode terminal connected to said emitter;
• a reference terminal;
• and an anode terminal supplied with said first dc voltage, said shunt regulator outputting a sum voltage of said first and said second dc voltages because said anode terminal is supplied with said first dc voltage;
• a second resistor whose one end is connected to said emitter and whose other end is supplied with said dc supply voltage;
• a third resistor whose one end is connected between said cathode terminal and said reference terminal;
• a fourth resistor connected between said reference terminal and said anode terminal;
• a current source for generating said current signal in accordance with a voltage signal;
• a d/a converter for generating said voltage signal in accordance with an external control signal,
• wherein said transistor clamps said color component signal with said sum voltage of said first and second dc voltage, and wherein said second capacitor decouples said sum voltage.