Pulse delay circuit having two comparators
AssigneeKabushiki Kaisha Toshiba
InventorKuniaki Goto
Life of this patent
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Abstract
A pulse signal delay circuit comprises an input node for receiving a first pulse signal, an output node for outputting a second pulse signal, a delay circuit for delaying the first pulse signal to provide a delayed signal, a first comparator for comparing the first pulse signal with the second pulse signal to output a first comparison result, and a second comparator for comparing the first comparision result with the delayed signal to output a second comparison result.
Claims12
A circuit for receiving and generating pulses, the circuit comprising:
- receiving means for receiving a first signal having a first signal pulse;
- first generating means, responsive to the first signal pulse, for generating a second signal to indicate a width of the first signal pulse;
- second generating means, having an input for receiving a third signal having a third signal pulse, for generating a fourth signal to indicate a width of the third signal pulse;
- delaying means for delaying the first signal to generate a fifth signal;
- comparing means for comparing the second signal to the fourth signal to generate a sixth signal;
- and
- third generating means, responsive to the fifth and sixth signals, for generating the third signal having the third signal pulse, the third signal pulse having a rising edge and a falling edge occurring in accordance with relative voltages of the fifth and sixth signals.
A circuit for generating an output pulse in response to an input pulse, the circuit comprising:
- receiving means for receiving a first signal;
- delaying means for delaying the first signal to generate a second signal;
- first integrating means for integrating the first signal to generate a third signal;
- first comparing means having a first input, responsive to the third signal, and a second input, responsive to a fourth signal, for comparing the third signal and the fourth signal to generate a fifth signal;
- second comparing means for comparing the second signal and the fifth signal to generate a sixth signal;
- and
- second integrating means for integrating the sixth signal to generate the fourth signal.
Dependencies are inferred from the claim text.