Circuit with reset noise cancellation

Abstract

A circuit primarily for use in conjunction with focal plane arrays which rejects input reset noise without adding power and complexity to the circuit. The circuit includes a preamplifier having input and output terminals, a first capacitor coupled between the input terminal and a source of reference potential, a second capacitor coupled between the output terminal and the source of reference potential, a switch coupled between the output terminal and the second capacitor coupling the output terminal to the second capacitor in response to a first predetermined signal, a third capacitor coupled between the junction of the switch and the second capacitor and a circuit output terminal and a plurality of fourth capacitors, each of the fourth capacitors coupled to a photodetector and having a switch responsive to a second predetermined signal controlling coupling of the fourth capacitor in parallel with the first capacitor. The values of the first, second, third and fourth capacitors are substantially in accordance with the relation C.sub.p /(C.sub.p +C.sub.DN)=C.sub.X /(C.sub.X +C.sub.c), where C.sub.P is the first capacitor, C.sub.X is the second capacitor, C.sub.C is the third capacitor and C.sub.DN is the fourth capacitor.

Dependencies are inferred from the claim text.