Interpolation analog/digital converter
AssigneeSGS-Thomson Microelectronics S.A.
InventorMichel Mouret
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AssigneeSGS-Thomson Microelectronics S.A.
InventorMichel Mouret
Estimating the term…
An N-bit interpolation analog/digital circuit comprises a first stage of p comparators (C.sub.1. . . C.sub.p). The outputs of the comparators are combined in a plurality of groups, which are connected so that the combined output (S.sub.1a, S.sub.1b) of each group has the shape of a signal periodically varying between high and low levels. The output voltages of each group are compared close to their zero crossings in second stages (I.sub.1. . . I.sub.r) of q+1 comparators each (p[q+1]=2.sup.N). Each comparator of the first stage is a high linearity comparator comprising two legs each comprising a first and a second transistor (T.sub.101, T.sub.102 ; T.sub.103, T.sub.104). The base of the second transistor of each leg is connected at the junction node of the transistors of the other leg through a voltage shifting means (E.sub.1, E.sub.2), and the emitters of the second transistors of each leg are interconnected through a resistor (RES).
An N-bit interpolation analog/digital circuit comprising a first stage of comparators, the outputs of which are combined into a plurality of groups, wherein a signal periodically varying between high and low levels is formed at the combined output of each group;
An interpolation analog-to-digital converter for converting an analog signal to a digital signal, said converter comprising:
In an analog-to-digital converter having input comparator means for comparing an input analog signal with reference signals, interpolation means connected to a group of said comparator means for interpolating a combined output signal of the group in order to form a plurality of interpolated signals encoding means connected to outputs of the interpolation means and input comparators for producing the digital signal;
Dependencies are inferred from the claim text.