High-order, plural-bit-quantization sigma-delta modulators using single-bit digital-to-analog conversion feedback

A sigma-delta modulator of N.sup.th order, N being a positive number greater than one so N.sup.th order is higher than first-order, said sigma-delta modulator comprising:

• means for supplying an analog input signal for said sigma-delta modulator;
• a network for generating an N.sup.th -order response equal to a transfer function times the difference between said analog input signal and an analog feedback signal;
• an analog-to-digital converter for converting said N.sup.th -order response to a digitized N.sup.th -order response with multiple-bit resolution;
• means responsive to digitized N.sup.th -order response with multiple-bit resolution for supplying a preliminary output signal for said sigma-delta modulator of N.sup.th order, said preliminary output signal being related to said digitized N.sup.th -order response by a scaling factor;
• means for generating said analog feedback signal in response to said digitized N.sup.th -order response with multiple-bit resolution;
• at least one unit sample delay in the feedback loop thus formed by said network for generating an N.sup.th -order response, said analog-to-digital converter and said means for generating said analog feedback signal;
• a digital-to-analog converter being included in said means for generating said analog feedback signal, said digital-to-analog converter connected for converting only the most significant bit of the digitized N.sup.th -order response, thereby to generate said analog feedback signal;
• and
• means for reducing error in the preliminary output signal for said sigma-delta modulator of N.sup.th order arising from said digital-to-analog converter converting only the most significant bit of the digitized N.sup.th -order response, said means for reducing error comprising:
• means for obtaining a digital representation of said analog feedback signal,
• means for generating a correction signal equal to said transfer function times said scaling factor times a differential response to the digitized N.sup.th -order response and the digital representation of said analog feedback signal, and
• means for combining the correction signal and the preliminary output signal to generate an output signal in which there is a reduction in said error arising from said digital-to-analog converter converting only the most significant bit of the digitized N.sup.th -order response to generate said analog feedback signal.