US 5,180,933 A · Programmable digital out-of-lock detector

Abstract

A out-of-lock detector is described which provides a first series of pulses that are compared to a data stream of pulses. Second and third series of pulses are also created by the present invention. These lead and lag pulses are provided to represent particular logical relationships between the data stream and a clock signal. The sequential relationship between the lead pulses and the lag pulses are compared to determine whether or not the clock pulses and the data pulses are in a phase lock condition or, alternatively, are in an out-of-lock condition. A sequence comparator provides a logically low output pulse if an out-of-lock event is detected. A counter compares the number of out-of-lock events which occur in a predetermined period of time to a preset and programmable value. If an out-of-lock condition is detected, some external means for providing corrective action can then be implemented to bring the phase locked loop into a condition where it can again achieve a locked state. Both the value of the counter modulo N and the value of the predetermined period of time during which out-of-lock conditions are counted are programmable.

Claims14

Dependent claims

An apparatus for detecting a deviation of a data signal from another signal of a predefined frequency, comprising:

first means for providing a first series of pulses at said predefined frequency;
second means for providing a second series of pulses, each of said second series of pulses being indicative of a first relationship between each of said first series of pulses and a coincident pulse of said data signal, said second providing means being connected in signal communication with said first providing means;
third means for providing a third series of pulses, each of said third series of pulses being indicative of a second relationship between each of said first series of pulses and said coincident pulse of said data signal, said third providing means being connected in signal communication with said first providing means;
means for determining the sequential relationship between each of said second series of pulses and a sequentially related pulse of said third series of pulses, said determining means being connected in signal communication with said second and third providing means;
fourth means for providing an output signal representing said sequential relationship;
means for defining a time period having a predefined length;
and
means for counting changes in magnitude of said output signal during said time period, said counting means being connected in signal communicating with said fourth providing means.

5 more elements

Dependencies are inferred from the claim text.

Programmable digital out-of-lock detector

Life of this patent

Programmable digital out-of-lock detector

Life of this patent

Abstract

Claims14