Current mode multiplexed sample and hold circuit
OwnerDavid W. Bengelinventor
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OwnerDavid W. Bengelinventor
Estimating the term…
A sample and hold circuit is disclosed in which differentially coupled input stages are multiplexed to drive a common output stage. In this way, a plurality of input stages can be employed wherein the transition between sample and hold modes produces greatly reduced switching transients. The circuit has very high overall gain so that sampling accuracy is improved and a very low current input stage configuration permits the use of small hold capacitors without introducing excessive droop in the hold mode. The differential balance is completed by a dummy hold capacitor which is switched along with the hold capacitor. Both of these capacitors are switched in a virtual ground configuration. Also, disclosed are means for producing an auto zero input condition, means for adding a correlation feature for improved digital performance and means for injecting controlled offset potentials so that the sample and hold means can be employed as either a DA converter or an AD converter in either a pipelined or recirculating converter state.
A sample and hold circuit having a signal input, an output and a control logic input, said control logic input being responsive to logic signals that command said circuit to operate in a sample mode in which said output replicates said signal input or in a hold mode in which said output holds the signal input value present at the instant of the hold logic command, said circuit comprising:
A sample and hold circuit capable of responding to an analog input signal to produce a related output in response to a sample mode command and to provide a constant output in response to a hold mode command wherein said constant output is a reproduction of said analog input signal at the instant of said hold command, said circuit comprising:
Dependencies are inferred from the claim text.