US 5,179,669 A · Multiprocessor interconnection and access arbitration arrangement

Abstract

In a multiprocessor system (FIG. 1), the processors (10-12) are interconnected by a non-blocking communication medium such as a crossbar switch (19). Each processor is connected to a dedicated port circuit (18) at the switch by an optical link (16). Each port circuit is connected to the crossbar switch by an electrical link (20). The port circuits are interconnected by a contention medium (14). A port circuit sends an access request by its connected processor to the destination processor over the contention medium. Circuitry (205) at each port circuit receives requests, for access to the connected processor, prioritizes conflicting requests, and grants them sequentially. The circuitry interleaves grants of access to the connected processor with grants of outgoing access requests made by the connected processor. The circuitry grants an access request by causing the crossbar switch to establish the corresponding connection.

Claims19

Dependent claims

A multiprocessor system comprising:

a plurality of processors;
a non-blocking communication medium interconnecting the plurality of processors;
a control communication medium interconnecting the plurality of processors;
means in each processor for communicating to another processor across the control medium a request to access the other processor;
resolving means associated with each processor, each resolving means responsive to conflicting requests for access to the associated processor received from other processors across the control medium, for resolving the conflicts and selectively granting the requests for access to the associated processor;
and
means, responsive to the granting of a request, for establishing a connection through the non-blocking communication medium between a requesting processor whose request was granted and a granting processor which granted the request.

4 more elements

A multiprocessor system comprising:

a plurality of processors;
a non-block communication medium;
a plurality of communication links, each connecting a processor to the non-blocking communication medium;
a control communication medium interconnecting the plurality of processors;
means in each processor for cummunicating to another processor across the control communication medium a request to access the communication link of the other processor;
resolving means associated with each processor, each resolving means responsive to received conflicting requests for access to the communication link of the associated processor, for resolving the conflicts and selectively granting the access requests;
and
means, responsive to the granting of a request, for establishing a connection through the non-blocking communication medium between the communication link of a requesting processor whose request was granted and the communication link to which the granted access was requested.

5 more elements

A multiprocessor system comprising:

a plurality of processors;
a non-blocking communication medium interconnecting the plurality of processors;
a plurality of port circuits, one connected to each processor, each port circuit having a different I.D.;
a contention medium interconnecting the plurality of port circuits;
and
transmission means for cyclically, sequentially transmitting the I.D.s of the plurality of port circuits on the contention medium;
each port circuit comprising
first means, responsive to a request from the connected processor for access to another processor, for transmitting the request to the other processor accross the contention medium when the I.D. of the other processor's port circuit is being transmitted on the contention medium by the transmission means,
second means for storing requests transmitted on the contention medium when the I.D. of the port circuit that includes the second means is transmitted on the contention medium by the transmission means,
third means for prioritizing requests stored by the second means,
fourth means for determining when the connected processor is ready for access by another processor, and
fifth means, responsive to determination by the fourth means that the connected processor is ready for access by another processor, for transmitting on the contention medium the I.D. of the port circuit having a highest-priority pending request stored by the second means, when the I.D. of the port circuit that includes the fifth means is transmitted on the contention medium by the transmission means;
the non-blocking communication medium responsive to transmission by one of the fifth means on the contention medium of the I.D. of a port circuit, for establishing a connection between the processors connected to the port circuits whose I.D.s are simultaneously transmitted on the contention medium by the one of the fifth means and the transmission means.

10 more elements

Dependencies are inferred from the claim text.

Multiprocessor interconnection and access arbitration arrangement

Life of this patent

Multiprocessor interconnection and access arbitration arrangement

Life of this patent

Abstract

Claims19