Spread PN code signal receiver

A spread PN code signal receiver including a delay locked loop circuit of performing a synchronization holding, the delay locked loop circuit (B) comprising:

• a PN code generator (25) for generating first and second sequences of PN code which are shifted in phase from each other by a predetermined number of bits;
• first correlation means (3) for taking a correlation between a received spread spectrum signal and the first PN code sequence to generate a first correlation signal indicative of the taken correlation;
• second correlation means (4) for taking a correlation between the received spread spectrum signal and the second PN code sequence to generate a second correlation signal indicative of the taken correlation;
• means (20) for combining the first and second correlation signals to produce a control signal;
• VCO means (22) controlled by the control signal for generating a shift clock pulse sequence to be applied to said PN code generator;
• a first comparator (33) for comparing the first correlation signal with a first threshold level to generate a first provisional lock signal when the first correlation signal exceeds the first threshold level;
• a second comparator (34) for comparing the second correlation signal with a second threshold level to generate a second provisional lock signal when the second correlation signal exceeds the second threshold level;
• and
• an AND gate (35) in response to the first and second provisional lock signals for generating a lock signal indicative of the lock status of the delayed loop circuit when both of the first and second provisional lock signals are present or an unlock signal when either of the first and second provisional lock signals are not present.