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US 5,179,540 AGranted
Programmable chip enable logic function
AssigneeHarris Corporation
InventorDavid W. Stockton
Life of this patent
Estimating the term…
Abstract
A programmable chip enable provides for enabling or disabling an integrated circuit in response to a selected one of a plurality of logic signals. In a specific application, the programmable enable function is used in combination with a plurality of field programmable memory devices. The enable functions of the respective devices are programmed to prevent simultaneous enablement of the memory devices which have their outputs connected together.
Claims21
An integrated circuit having a programmable chip enable, comprising:
- at least one data input;
- at least one data output;
- an enable input for receiving at least one of a relatively high logic level signal and a relatively low logic level signal from an external source;
- and
- programmable circuit means, connected to said enable input, for enabling the integrated circuit to produce an output signal at said data output in response to a selected one of said relatively high and said relatively low logic level signals received at said enable input, and for disabling the integrated circuit to prevent an output signal from being produced at the data output in response to the other of said signals received at the enable input.
2 more elements
A field programmable memory device having a programmable chip enable, comprising:
- an array of memory elements;
- a plurality of inputs and outputs for accessing the memory elements;
- an enable input for receiving at least one of a relatively high logic level signal and a relatively low logic level signal from an external source;
- and
- programmable circuit means, connected to said enable input for receiving logic level signals, for enabling the memory device in response to a selected one of said relatively high and said relatively low logic level signals received at said enable input;
- wherein said programmable circuit means has a programming input, connected to a programming control signal source, for receiving a programming control signal to program the programmable circuit means to respond to said selected one of said relatively high and low logic level signals received at said enable input.
3 more elements
An integrated circuit device, comprising:
- a circuit having at least one input and at least one output, and having an enable input;
- an enabling circuit having an input connected to an input pin of the integrated circuit device for receiving at least one of a relatively high logic level signal and a relatively low logic level signal from an external source, and having an output connected to the enable input of the circuit, and having a programming input connected to a programming control signal source;
- and
- programmable means in said enabling circuit for causing the enabling circuit to provide an enabling signal to the enabling input of the circuit in response to a selected one of said relatively high and said relatively low logic level signals.
1 more element
A field programmable memory device, comprising:
- an array of memory elements;
- a plurality of inputs and outputs for accessing the memory elements;
- an enable input for receiving a signal which enables the memory device;
- an enabling circuit having an input connected to an input pin of the memory device for receiving at least one of a relatively high logic level signal and a relatively low logic level signal from an external source, and having an output connected to the enable input of the memory device, and having a programming input connected to a programming control signal source;
- and
- programmable means in said enabling circuit for causing the enabling circuit to provide the enabling signal to the enabling input in response to a selected one of said relatively high and said relatively low logic level signals.
3 more elements
A programmable chip enable for an integrated circuit, comprising:
- an input for receiving at least one of a relatively high logic level signal and a relatively low logic level signal from an external source;
- and
- programmable circuit means, connected to said input, for enabling the integrated circuit in response to a selected one of said relatively high and said relatively low logic level signals received at said input;
- wherein said programmable circuit means comprises a logic element having a first input connected to said input for receiving logic level signals from said external source, a second input connected to a reference voltage by a programmable element, and means for programming said programmable element;
- and
- wherein said means for programming said programmable element comprises an inverter having an input connected to the programmable element and having an output, and a NAND gate having a first input connected to the output of the inverter, a second input connected to a programming control signal source, and an output connected to the programmable element.
3 more elements
A field programmable memory device comprising:
- an array of memory elements;
- a plurality of inputs and outputs for accessing the memory elements;
- an input for receiving at least one of a relatively high logic level signal and a relatively low logic level signal from an external source;
- and
- programmable circuit means, connected to said input for receiving logic level signals, for enabling the memory device in response to a selected one of said relatively high and said relatively low logic level signals received at said input;
- wherein said programmable circuit means comprises a logic element having a first input connected to said input for receiving logic level signals from an external source, a second input connected to a reference voltage by a programmable element, and means for programming said programmable element;
- and
- wherein said means for programming said programmable element comprises an inverter having an input connected to the programmable element and having an output, and a NAND gate having a first input connected to the output of the inverter, a second input connected to a programming control signal source, and an output connected to the programmable element.
5 more elements
A field programmable memory device having a programmable chip enable, comprising:
- an array of memory elements;
- a plurality of inputs and outputs for accessing the memory elements;
- an enable input for receiving at least one of a relatively high logic level signal and a relatively low logic level signal from an external source;
- and
- programmable circuit means, connected to said enable input for receiving logic level signals, for enabling the memory device to provide access to the memory elements in response to a selected one of said relatively high and said relatively low logic level signals received at said enable input, and for disabling the memory device to prevent access to the memory elements in response to the other of said signals received at the enable input.
2 more elements
Dependencies are inferred from the claim text.