Three dimensional CCD image sensor

A three dimensional CCD image sensor, comprising:

• a silicon substrate;
• an oxide layer formed to a desired thickness on said silicon substrate;
• a plurality of gate electrodes formed of polysilicon layers separated from each other by a desired separation interval on said oxide layer, said gate electrodes constructed and arranged for receiving clock signals;
• a thin gate oxide layer formed on the whole surface of said oxide layer including said plurality of gate electrodes;
• an N.sup.+ type ion layer formed on the surface of gate oxide layer using low energy;
• a P type epitaxial layer formed to a predetermined thickness on said gate oxide layer and the N.sup.+ type ion layers;
• a plurality of N type light receiving regions formed on the upper surface of said P type epitaxial layer, for receiving light;
• a plurality of N type VCCD formed on the lower surface of said P type epitaxial layer by diffusing the N.sup.+ regions, for inputting signal charges of light produced from said plurality of N type light receiving regions;
• wherein the layers are arranged such that said plurality of N type light receiving regions and said plurality of N type VCCD regions are formed opposite to each other and spaced in sequence at a desired spacing interval on said upper and lower surfaces of said P type epitaxial layer;
• a desired area of a charge transfer path formed out of the P type epitaxial layer between each of said plurality of N type light receiving regions and each of said plurality of N type VCCD regions, said signal charges of light passed through said charge transfer path;
• a P.sup.+ type charge transfer barrier formed to a predetermined thickness at the remaining portion, between each of said plurality of N type light receiving regions and each of said plurality of N type VCCD regions except where said charge transfer path is to be formed;
• whereby said signal charges stored in the lower side of each said plurality of N type light receiving regions are transferred to the corresponding N type VCCD regions by clock signals applied to said gate electrodes.

A three dimensional CCD image sensor, comprising:

• a silicon substrate;
• an oxide layer formed on the silicon substrate;
• a plurality of gate electrodes for applying clock signals formed repeatedly at a desired interval on the oxide layer;
• a thin gate oxide layer formed on the surface of the oxide layer and the gate electrodes
• a P type epitaxial layer formed to a predetermined thickness on said gate oxide layer, the P type epitaxial layer having an upper and lower surface;
• a plurality of N type light receiving regions formed on the upper surface of the P type epitaxial layer;
• an N type VCCD region associated with each N type light receiving region, each VCCD region formed on the lower surface of said P type epitaxial layer opposite the associated N type light receiving region, such that the area of the P type epitaxial layer located in between each pair of N type light receiving regions and N type VCCD region comprises a charge transfer path through which signal charges stored in the lower side of each N type light receiving region may transfer to the associated N type VCCD region;
• and
• a plurality of P.sup.+ type charge transfer barriers formed in the P type epitaxial layer between each of said plurality of charge transfer paths.