Analog to digital convertor with drift compensation

An analog to digital convertor comprising:

• amplifier means responsive to an analog input signal for providing an amplified output signal;
• conversion means responsive to said amplified output signal for providing a digital signal as a function of said amplified output signal by periodically sampling said amplified output signal and providing a digital word as a function of each sample;
• compensation means responsive to drift in the steady state level of said digital signal for providing a compensated signal, said compensation means having:
• tracking means responsive to drift in the steady state level of said digital signal which is between predetermined upper and lower limits for summing a predetermined digital offset value with said digital signal in order to negate the drift of said amplified output signal;
• bias means connected to said amplifier and responsive to drift in the steady state level of said digital signal for providing a bias level change to said analog input signal in order to bring the steady state level of said digital signal within said predetermined limits;
• and,
• logic means responsive to said bias level change for modifying said digital signal in order to compensate for said bias level change, wherein said logic means comprises:
• memory means for storing an array of compensation values corresponding to consecutive samples of said bias level change;
• summing means responsive to said digital signal and said compensation values for providing said compensated signal as the sum of:
• a) each consecutive said digital word corresponding to each consecutive sample of said bias level change;
• b) said predetermined digital offset value;
• and, c) said corresponding compensation value stored in said array for each consecutive sample of said bias level change;
• and
• multiplying means for multiplying each said compensation value by a predetermined digitized gain factor stored in said memory.