Switched current differentiator circuit for differentiating an input signal in the form of a sampled analog current

Abstract

A differentiator circuit for sampled analog input currents comprises a first current memory cell including a capacitor (C2), a switch (S2), a transistor (T2) and a transistor (T3) and a second current memory cell including a capacitor (C1), a switch (S1) and a transistor (T1). During one portion (.phi.1) of each sampling period the input current (i) minus the current produced by the transistor (T1), which acts as a current source when switch (S1) is open, together with appropriate bias currents to allow bi-directional input currents to be handled, is fed via a switch (S3) to the first current memory cell. During another portion (.phi.2) of each sampling period the input current plus an appropriate bias current is fed to the input of the second current memory cell. The switches (S3) and (S2) are open so transistor (T2) acts as a current source providing an output via switch (S4) at an output (17) in addition to the output (15). The differentiated output signal is available throughout at output (15) but only during the other portion (.phi.2) of each sampling period at output (17). The circuit corresponds to a backward Euler mapping from continuous time ideal differentiators. Corresponding circuits giving foward Euler and bilinear mappings are also disclosed as are circuits for lossy differentiators. Various alternative current memory cells are disclosed.

Dependencies are inferred from the claim text.