Charge pump substrate bias circuit
AssigneeSharp Kabushiki Kaisha
InventorNobuhiko Ito
Life of this patent
Estimating the term…
Loading patent…
AssigneeSharp Kabushiki Kaisha
InventorNobuhiko Ito
Estimating the term…
A charge pump circuit having a pumping capacitor is provided. A first terminal of the pumping capacitor is connected to a V.sub.CC power source through a P-MOS transistor, and grounded via an N-MOS transistor. The gates of these transistors receive a signal in which the HIGH level and the LOW level are alternately repeated. A second terminal of the pumping capacitor is grounded via an N-MOS transistor. The gate of the N-MOS transistor is connected to a terminal through a capacitor, and also to the second terminal of the pumping capacitor via an N-MOS transistor the gate of which is grounded. The second terminal is connected to an external circuit through an N-MOS transistor. The gate of the N-MOS transistor is connected to a terminal through a capacitor, and also to the output terminal through an N-MOS transistor the gate of which is connected to the node.
A charge pump circuit comprising:
Dependencies are inferred from the claim text.