CMOS current steering circuit

A current steering circuit comprising:

• a first powering device having an input, an output and a control input;
• a second powering device having an input, an output and a control input;
• a first idling device having an output;
• a second idling device having an input and an output;
• the first idling device output, the first powering device output, the second idling device input and the second powering device input being electrically connected;
• means for introducing a voltage to the first powering device input;
• means for introducing a first controllable bias voltage to the first powering device control input to allow control of current output from the first powering device;
• means for introducing a second controllable bias voltage to the second powering device control input to allow control of conductivity through and current output from the second powering device;
• and
• the first idling device being configured to output a substantially constant current.

A current steering circuit comprising:

• a plurality of first stage powering devices, each having an input, an output and a control input;
• a plurality of second stage powering devices, each having an input and an output;
• a first idling device having an output;
• a second idling device having an input, an output and a control input;
• the first idling device output, each first powering device output, the second idling device input and each second powering device input being electrically connected;
• means for introducing a voltage to each first powering device input;
• a plurality of first stage controllable bias voltage sources, each corresponding to at least one first stage powering device, being configured to introduce each first stage controllable bias voltage to each corresponding first stage powering device control input to allow control of current output from each first stage powering device;
• means for introducing a second stage controllable bias voltage to the second idling device control input to allow control of conductivity through the second idling device;
• and
• the first idling device being configured to output a substantially constant current.

A current steering circuit comprising:

• a plurality of first stage powering transistors, a plurality of second stage powering transistors, a first idling transistor and a second idling transistor, each transistor having an input, an output and a control input;
• the first idling transistor output, each first stage powering transistor output, the second idling transistor input and each second stage powering transistor input being electrically connected;
• means for introducing a voltage to each first powering transistor input;
• means for introducing a voltage to the first idling transistor input;
• means for introducing a bias voltage to the first idling transistor control input;
• a plurality of means corresponding to the plurality of first stage powering transistors for introducing a first stage controllable bias voltage to each corresponding first stage powering transistor control input;
• means for introducing a second stage controllable bias voltage to the second idling transistor;
• and
• means for introducing a bias voltage to each second stage powering transistor control input.

A method of controlling electric current in an electronic circuit comprising the steps of:

• generating an idling current;
• generating a controllable powering current;
• electrically connecting the idling and powering currents to an input of a current routing device having a first controllably conductive current path and a second current path;
• correlating the generation of the powering current with the conductivity of the first current path to substantially allow conductivity through the first path during generation of the powering current and to substantially inhibit conductivity through the first path during non-generation of the powering current.