US 5,177,568 AGranted

Tunnel injection semiconductor devices with Schottky barriers

AssigneeHitachi, Ltd.

InventorsHideo Honma, Sumio Kawakami, Takahiro Nagano

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Abstract

A tunnel injection type semiconductor device having an MIS structure comprising a semiconductor region, a source, a drain and a gate electrode, wherein said source and said drain are composed of a metal or metal compound member, respectively, and wherein both have an overlapping portion with said gate electrode. A first conductivity type high impurity concentration semiconductor layer is formed in said semiconductor region in contact with and contiguous to said metalic member at the drain side. The source provides a Schottky barrier junction to said semiconductor region while said drain provides an ohmic contact to said semiconductor region. Using this structure a tunneling current flowing across a Schottky barrier junction between said source and said drain is controlled by a gate voltage.

A semiconductor device comprising:

a substrate having a first surface;
a first semiconductor region of a first conductivity type extending from the first surface into the substrate;
a second semiconductor region of the first conductivity type extending from the first surface into the first semiconductor region, the second semiconductor region having a higher impurity concentration than that of the first semiconductor region;
a third semiconductor region of a second conductivity type opposite to that of the first semiconductor region, the third semiconductor region extending from the first surface into the first semiconductor region and having a predetermined low impurity concentration;
a drain region extending from the first surface into the second semiconductor region, the drain region being comprised of one of a metal and a metal compound;
a source region extending from the first surface into the first semiconductor region, the source being comprised of one of a metal and a metal compound;
a drain electrode located on the drain region;
a source electrode located on the source region;
an insulating film on the first surface, disposed at least on a portion of the first semiconductor region located between the drain and source regions;
and
a control electrode on the insulating film and overlying the portion of the first semiconductor region located between the drain and the source regions;
wherein a Schottky barrier junction is provided between the source region and the third semiconductor region while an ohmic contact is provided between the drain region and the second semiconductor region;
wherein the predetermined low impurity concentration of the third semiconductor region is set so that leakage current in a reverse direction of said Schottky barrier junction is reduced without affecting forward characteristics of the Schottky barrier junction;
and
wherein a tunneling current flowing across the Schottky barrier junction between the source and the drain regions is controlled by a control voltage applied to the control electrode.

12 more elements

Facts

Application

07/738,604Filed 30 Jul 1991

Priority

JP 2-2050053 Aug 1990

Granted

5 Jan 1993

Term ends

Not estimatedThe source records don’t support an estimate.

Classification9 codes

H10D 30/0277
Of lateral single-gate IGFETs: forming conductor-insulator-semiconductor or Schottky barrier source or drain regions
H10D 30/00
Field-effect transistors [fet]
H10D 30/0221
Of FETs having insulated gates [IGFET]: having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or…
H10D 64/64
Electrodes characterised by their materials: electrodes comprising a Schottky barrier to a semiconductor

Abstract

Claims4