Bi-CMOS circuit
AssigneeFujitsu Limited
InventorsHiroyuki Mathuda, Shinzou Satou
Life of this patent
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Abstract
A Bi-CMOS circuit includes a bipolar output stage and a CMOS circuit. The bipolar output stage includes pull-up and pull-down transistors which form an output end. The CMOS circuit receives an input signal and generates a signal for driving the output stage. The CMOS circuit comprises a CMOS inverter for receiving the input signal, a p-channel MOS transistor for driving the pull-up transistor of the bipolar output stage based on the input signal, an n-channel MOS transistor for driving the pull-down transistors of the bipolar output stage based on the input signal, a p-channel MOS transistor for discharging a base of the pull-up transistor based on an output of the CMOS inverter, and an n-channel MOS transistor for discharging a base of the pull-down transistor based on an output of the CMOS inverter.
Claims11
A Bi-CMOS circuit supplied with an input signal, comprising:
- an output stage including pull-up and pull-down transistors connected in series between a high-potential power source and a low-potential power source, to receive the drive signals respectively, a node of the pull-up and pull-down transistors forming an output end;
- and
- a CMOS circuit coupled to said output stage, for receiving an input signal and generating drive signals for driving the output stage, the CMOS circuit including
- a CMOS inverter for receiving an input signal, and
- a MOS sub-circuit coupled to the CMOS inverter, having a first MOS transistor for driving the pull-up transistor of the output stage based on the input signal, a second MOS transistor for driving the pull-down transistor of the output stage based on the input signal, a third MOS transistor for discharging the pull-up transistor based on an output of the CMOS inverter, and a fourth MOS transistor for discharging the pull-down transistor based on the output of the CMOS inverter.
A Bi-CMOS circuit supplied with an input signal, comprising:
- a CMOS inverter for receiving the input signal, and for generating an inverted signal based on the input signal;
- a first MOS driving transistor for generating a first driving signal in response to the input signal;
- a second MOS driving transistor coupled to said CMOS inverter, for generating a second driving signal based on the inverted signal;
- a bipolar pull-up transistor circuit coupled to the first MOS driving transistor, for pulling up an output signal level based on the first driving signal;
- and
- a bipolar pull-down transistor circuit coupled to said bipolar pull-up transistor circuit and said second MOS driving transistor, for pulling down the output signal level at a coupling point between said bipolar pull-up transistor circuit and said bipolar pull-down transistor, based on the second driving signal;
- said bipolar pull-up transistor circuit including a Darlington pair.
Dependencies are inferred from the claim text.