Planarization process for trench isolation in integrated circuit manufacture

A method of planarizing a face of a semiconductor body, comprising the steps of:

• etching trenches of various widths in said face to leave active areas of said face;
• forming a first conformal coating of insulator on said face, coating the sidewalls of said trenches as well as flat surfaces of the face in the trenches and between the trenches;
• etching said coating to leave sidewall spacers at the edges of said trenches;
• forming a second conformal coating of said insulator on said face, coating the spacers at said sidewalls of said trenches as well as flat surfaces of the face in the trenches and between the trenches;
• depositing a first layer of photoresist on said face over said second conformal coating and patterning said first layer to leave said layer only in first ones of said trenches, said first ones of said trenches being wider than certain other ones of said trenches, the width of said first ones leaving a substantial amount of the bottom of said first ones not covered by said sidewall spacers after said step of etching said coating;
• said first layer having a top surface after said patterning at about the level of the top surface of said second conformal coating at said active areas;
• reflowing said first layer of photoresist to fill any gaps at edges of said photoresist and to planarize the surface of said first layer of photoresist;
• depositing a second layer of photoresist over said face over said first layer of photoresist and over said second conformal coating;
• etching said second layer of photoresist to said second conformal coating to leave photoresist in said certain other ones of said trenches where said first layer is not present;
• depositing a third layer of photoresist on said face;
• etching said first, second and third layers of photoresist and said second conformal coating down to the level of tops of said active areas to leave a substantially planar surface for formation of devices in said active areas.

A method of planarizing a face of a semiconductor body, comprising the steps of:

• etching trenches of various widths in said face to leave active areas of said face;
• forming a conformal coating of silicon oxide on said face, coating the sidewalls of said trenches as well as flat surfaces of the face in the trenches and between the trenches;
• depositing a first layer of photoresist on said face over said conformal coating and patterning said first layer to leave said layer only in first ones of said trenches, said first ones being wider than other ones of said trenches, the width of said first ones leaving a substantial amount of the bottom of said first ones not covered by said sidewall spacers after said step of etching said coating;
• said first layer having a top surface after said patterning being at about the level of the top surface of said conformal coating at said active areas;
• reflowing said first layer of photoresist to fill any gaps at edges of said photoresist and to planarize the surface of said first layer of photoresist;
• depositing a second layer of photoresist over said face over said first layer of photoresist and over said conformal coating;
• etching said second layer of photoresist to said conformal coating to leave photoresist in said other ones of said trenches where said first layer is not present;
• depositing a third layer of photoresist on said face;
• etching said first, second and third layers of photoresist and said conformal coating down to the level of tops of said active areas to leave a substantially planar surface for formation of devices in said active areas.

A method of planarizing a face of a semiconductor body, comprising the steps of:

• etching trenches of various widths in said face to leave active areas of said face;
• said trenches including first ones of a width which is wider than other ones of said trenches;
• forming a conformal coating of insulator on said face, coating the sidewalls of said trenches as well as flat surfaces of the face in the trenches and between the trenches;
• etching said conformal coating to leave sidewall spacers at the edges of said trenches;
• the width of said first ones leaving a substantial amount of the bottom of said first ones not covered by said sidewall spacers after said step of etching said coating;
• forming a second conformal coating of insulator on said face, coating the spacers at said sidewalls of said trenches as well as any flat surfaces of the face in the trenches and between the trenches;
• depositing a first layer of photoresist on said face over said second conformal coating and patterning said first layer to leave said layer only in said first ones of said trenches;
• said first layer of photoresist having a top surface after said patterning being at about the level of the top surface of said second conformal coating at said active areas;
• depositing a second layer of photoresist over said face over said first layer of photoresist and over said conformal coating;
• etching said second layer of photoresist to said second conformal coating to leave photoresist in narrower ones of said trenches where said first layer is not present;
• depositing a third layer of photoresist on said face;
• etching said first, second and third layers of photoresist and said second conformal coating down to the level of tops of said active areas to leave a substantially planar surface for formation of devices in said active areas.