Method of fabricating a base-coupled transistor logic
AssigneeFairchild Camera and Instrument Corporation
InventorAshok K. Kapoor
Life of this patent
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Abstract
A base-coupled logic gate is characterized by input Schottky diodes that are directly formed on the base region of the switching transistor for the gate. A logic of this type provides flexible circuit arrangements and savings in required area, while achieving very high speeds. As a result of the savings in area, the buried layer capacitance of the gate is also reduced, which facilitates the high-speed operation of the circuit.
Claims9
A method for fabricating a monolithic transistor logic circuit, comprising the steps of:
- forming two isolated islands of a semiconductor material of one conductivity type on a substrate;
- depositing a control layer on at least one of said islands;
- lightly doping said at least one island with an impurity of a conductivity type opposite to said one type;
- removing the control layer form said at least one island except in the areas where active devices are to be formed;
- growing a layer of oxide in those regions from which the control layer was removed;
- removing the control layer from one of said areas and doping said area with an impurity of said one conductivity type to form an emitter;
- removing the remaining control layer on said islands;
- and
- forming Schottky diodes on said areas of said one island other than said emitter to provide the input terminals for said logic circuit.
The method of claim 9 wherein said control layer is a layer of nitride.
A method of fabricating a base-coupled logic gate, comprising the steps of:
- growing a n-type epitaxial layer on a semiconductor substrate;
- forming a p-type base region in said epitaxial layer;
- providing a n-type collector region in said base region in an upward mode configuration to form an output terminal of the gate;
- depositing one of a metal or a silicide on said base region to form multiple Schottky diodes which comprise multiple input terminals for the gate;
- providing isolation regions in said p-type base region between said multiple Schottky diodes;
- and
- forming an emitter region in said epitaxial layer that is isolated from said base region by a portion of said epitaxial layer.
Dependencies are inferred from the claim text.