Parallel I/O network file server architecture

Network server apparatus for use with a data network and a mass storage device, comprising:

• a network control unit coupleable to said network;
• a data control unit coupleable to said mass storage device;
• a buffer memory;
• means for transmitting from said network control unit to said data control unit requests from said network to store specified storage data from said network on said mass storage device;
• means for transmitting said specified storage data by DMA from said network control unit to said buffer memory and by DMA from said buffer memory to said data control unit;
• means for transmitting from said network control unit to said data control unit requests from said network to retrieve specified retrieval data from said mass storage device to said network;
• and
• means for transmitting said specified retrieval data by DMA from said data control unit to said buffer memory and by DMA from said buffer memory to said network control unit.

A data control unit for use with a data network and a mass storage device, and in response to file system level storage and retrieval requests from said data network, comprising:

• a data bus different from said network;
• a buffer memory bank coupled to said bus;
• storage processor apparatus coupled to said bus and coupleable to said mass storage device;
• file processor apparatus coupled to said bus, said file processor apparatus including a local memory bank
• first means on said file processor unit for translating said file system level storage requests into requests to store data at specified physical storage locations in said mass storage device;
• and
• second means on said file processor unit for translating said file system level retrieval requests into requests to retrieve data from specified physical retrieval locations in said mass storage device, said first and second means for translating collectively including means for caching file control information through said local memory bank in said file processor unit,
• said data control unit further comprising means for caching the file data, to be stored or retrieved according to said storage and retrieval requests, through said buffer memory bank.

A network node for use with a data network and a mass storage device, comprising:

• a system buffer memory;
• a host processor unit having direct memory access to said system buffer memory;
• a network control unit coupleable to said network and having direct memory access to said system buffer memory;
• a data control unit coupleable to said mass storage device and having direct memory access to said system buffer memory;
• first means for satisfying requests from said network to store data from said network on said mass storage device;
• second means for satisfying requests from said network to retrieve data from said mass storage device to said network;
• and
• third means for transmitting predefined categories of messages from said network to said host processor unit for processing in said host processor unit, said first, second and third means collectively including
• means for transmitting from said network control unit to said system memory bank by direct memory access file data from said network for storage on said mass storage device,
• means for transmitting from said system memory bank to said data control unit by direct memory access said file data from said network for storage on said mass storage device,
• means for transmitting from said data control unit to said system memory bank by direct memory access file data for retrieval from said mass storage device to said network, and
• means for transmitting from said system memory bank to said network control unit said file data for retrieval from said mass storage device to said network;
• at least said network control unit including a microprocessor and local instruction storage means distinct from said system buffer memory, all instructions for said microprocessor residing in said local instruction storage means.

Network server apparatus for use with a data network, comprising:

• a network controller coupleable to said network to receive incoming information packets over said network, said incoming information packets including certain packets which contain part or all of a request to said server apparatus, said request being in either a first or a second class of requests to said server apparatus;
• a first additional processor;
• an interchange bus different from said network and coupled between said network controller and said first additional processor;
• means in said network controller for detecting and satisfying requests in said first class of requests contained in said certain incoming information packets, said network controller lacking means in said network controller for satisfying requests in said second class of requests;
• means in said network controller for detecting and assembling into assembled requests, requests in said second class of requests contained in said certain incoming information packets;
• means for delivering said assembled requests from said network controller to said first additional processor over said interchange bus;
• and
• means in said first additional processor for further processing said assembled requests in said second class of requests.

Network server apparatus for use with a data network, comprising:

• a network controller coupleable to said network to receive incoming information packets over said network, said incoming information packets including certain packets which contain part or all of a message to said server apparatus, said message being in either a first or a second class of messages to said server apparatus, said messages in said first class or messages including certain messages containing requests;
• a host computer;
• an interchange bus different from said network and coupled between said network controller and said host computer;
• means in said network controller for detecting and satisfying said requests in said first class of messages;
• means for delivering messages in said second class of messages from said network controller to said host computer over said interchange bus;
• and
• means in said host computer for further processing said messages in said second class of messages.

File server apparatus for use with a mass storage device, comprising:

• a requesting unit capable of issuing calls to file system procedures in a device-independent form;
• a file controller including means for converting said file system procedure calls from said device-independent form to a device-specific form and means for issuing device-specific commands in response to at least a subset of said procedure calls, said file controller operating in parallel with said requesting unit;
• and
• a storage processor including means for executing said device-specific commands on said mass storage device, said storage processor operating in parallel with said requesting unit and said file controller.

Network controller apparatus for use with a first data network carrying signals representing information packets encoded according to a first physical layer protocol, comprising:

• a first network interface unit, a first packet bus and first packet memory addressable by said first network interface unit over said first packet bus, said first network interface unit including means for receiving signals over said first network representing incoming information packets, extracting said incoming information packets and writing said incoming information packets into said first packet memory over said first packet bus;
• a first packet bus port;
• first packet DMA means for reading data over said first packet bus from said first packet memory to said first packet bus port;
• and
• a local processor including means for accessing said incoming information packets in said first packet memory and, in response to the contents of said incoming information packets, controlling said first packet DMA means to read selected data over said first packet bus from said first packet memory to said first packet bus port, said local processor including a CPU, a CPU bus and CPU memory containing CPU instructions, said local processor operating in response to said CPU instructions, said CPU instructions being received by said CPU over said CPU bus independently of any of said writing by said first network interface unit of incoming information packets into said first packet memory over said first packet bus and independently of any of said reading by said first packet DMA means of data over said first packet bus from said first packet memory to said first packet bus port.

Apparatus according to claim 61, further comprising:

• first and second FIFOs, each having first and second ports, said fist port of said first FIFO being said first packet bus port and said first port of said second FIFO being said second packet bus port;
• an interchange bus;
• and
• interchange bus DMA means for transferring data between said interchange bus and either said second port of said first FIFO or said second port of said second FIFO, selectably in response to DMA control signals from said local processor.

Apparatus according to claim 62, wherein said interchange bus DMA means comprises:

• a transfer bus coupled to said second port of said first FIFO and to said second port of said second FIFO;
• coupling means coupled between said transfer bus and said interchange bus;
• and
• a controller coupled to receive said DMA control signals from said processor and coupled to said first and second FIFOs and to said coupling means to control data transfers over said transfer bus.

Storage processing apparatus for use with a plurality of storage devices on a respective plurality of channel buses, and an interchange bus, said interchange bus capable of transferring data at a higher rate than any of said channel buses, comprising:

• data transfer means coupled to each of said channel buses and to said interchange bus, for transferring data in parallel between said data transfer means and each of said channel buses at the data transfer rates of each of said channel buses, respectively, and for transferring data between said data transfer means and said interchange bus at a data transfer rate higher than said data transfer rates of any of said channel buses;
• and
• a local processor including transfer control means for controlling said data transfer means to transfer data between said data transfer means and specified ones of said channel buses and for controlling said data transfer means to transfer data between said data transfer means and said interchange bus,
• said local processor including a CPU, a CPU bus and CPU memory containing CPU instructions, said local processor operating in response to said CPU instructions, said CPU instructions being received by said CPU over said CPU bus independently of any of said data transfers between said channel buses and said data transfer means and independently of any of said data transfers between said data transfer means and said interchange bus.