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US 5,161,190 AGranted
System for encryption and identification
AssigneeComputer Security Corporation
InventorJohn P. Cairns
Life of this patent
Estimating the term…
Abstract
A delay means in a security apparatus for identifying a code of characters to authenticate access to the apparatus by matching an entered code with a stored value by a procedure which so enciphers the coded information as it is entered into the apparatus and displayed on a keyboard that disclosure of the code by observation of the entry operation is prevented. A delay timing circuit produces a delayed signal in the matching of the entered code and the stored value so that the length of the period of time for authentication is controllable.
Claims11
A security apparatus for identification of a preselected code of characters by a predetermined cryptograph of symbols.
- comprising in combination a plurality of latches,
- a predetermined program of a preselected code of symbols consisting of alphanumeric characters in binary coded decimals and matrix coefficient in a first memory having potential levels at addresses,
- selectively operable switches,
- means for providing pulses to said addresses in said first memory
- upon the operation of a switch,
- means for transmitting the potential levels of said binary coded decimals from said first memory to said plurality of latches,
- means for storing said binary coded decimals in said latches whereby each transmitted binary coded decimal is stored in a latch,
- means upon said operation of said switch for generating a pulse to a delay timing circuit,
- means for transmitting a delayed signal from said delay timing circuit to produce a timed sequence of signals selected to be transmitted to said selected latches subsequent to the storage of the binary coded decimals in said latches,
- means for transmitting the stored binary decimals in each of said latches to a decoding circuit and to a sending circuit,
- means for decoding the stored binary coded decimals in the decoding circuit to read out the potential levels to segments of a light emitting diode,
- means electrically connecting one of said selectively operable switches to said sending circuit for providing a signal to said sending circuit upon operation of said switch.
- means for depositing the binary coded decimal from said sending circuit on an electrical connection to a microprocessor upon transmission of said signal from said switch,
- said microprocessor having a second memory accessed by the microprocessor, said microprocessor being operative for executing a program stored in said second memory,
- means for storing in said second memory at least one access code of a preselected code of symbols consisting of at least one alpha-numeric character and at least one matrix coefficient,
- operative to sequentially enter to said microprocessor pulses defining said actuated code of symbols,
- said microprocessor having means for comparing the binary coded decimal produced by the operation of the sending circuit with the stored access code,
- and delay means included in said apparatus for delaying the operation of one or more of said means.
15 more elements
A security apparatus for identification of a preselected code of characters by a predetermined cryptograph of symbols comprising in combination
- a matrix consisting of an arrangement of a plurality of locations having selectively operable manual switches and variable visible indicia associated with said switches, said indicia operative to display letters and numerals at said locations,
- said switches being sequentially actuatable with a sequence of values representing a preselected code of symbols consisting of alphanumeric characters and matrix coefficients,
- a matrix coefficient consisting of a value represented by a visible indicia at a selected location at a selected sequence in said preselected code,
- a first memory containing a configuration of alphanumeric characters and matrix coefficients for display on said variable visible indicia
- a predetermined program of a preselected code of symbols consisting of alphanumeric characters in binary coded decimals and matrix coefficient in said first memory having potential levels at addresses,
- (a) said microprocessor having a second memory accessed by the microprocessor, said microprocessor being operative for executing a program stored in said second memory,
- means for storing in said second memory at least one access code of a preselected code of symbols consisting of at least one alphanumeric character and at least one matrix coefficient,
- operative to sequentially enter to said microprocessor pulses defining said actuated code of symbols,
- said microprocessor having means for comparing the binary coded decimal produced by the operation of the sending circuit with the stored access code,
- and delay circuit means in said apparatus for delaying the identification of said preselected code of characters.
7 more elements
A method of identifying a predetermined cryptograph of symbols
- comprising the steps of
- providing a predetermined program of a preselected code of symbols consisting of alphanumeric characters in binary coded decimals and matrix coefficient in a first memory having potential levels at addresses,
- providing selectively operable switches,
- providing pulses from said switches to said addresses in said first memory,
- transmitting the potential levels of said binary coded decimals from said first memory to a plurality of latches, to provide potential levels in selected latches,
- means for providing pulses to said addresses in said first memory upon the operation of a switch
- means for transmitting the potential levels of said binary coded decimals from said first memory to said plurality of latches,
- means for storing said binary coded decimals in said latches whereby each transmitted binary coded decimal is stored in a latch,
- means upon operation of said switch for generating a pulse to a delay timing circuit,
- means for transmitting a delayed signal from said delay timing circuit to produce a timed sequence of signals selected to be transmitted to said selected latches subsequent to the storage of the binary coded decimals in said latches,
- transmitting the stored binary decimals in each of said latches to a decoding circuit and to a sending circuit,
- means associated with said first memory for displaying on said variable visible indicia upon actuation of said switches of a plurality of said symbols including at least one alphanumeric character and at least one matrix coefficient in said actuated code of symbols,
- means electrically connecting one of said manual switches to said sending circuit for providing a signal to said sending circuit upon operation of said manual switch,
- means for depositing the binary coded decimal from said sending circuit on an electrical connection to a microprocessor upon transmission of said signal from said manual switch,
- storing said binary coded decimals in said latches whereby each transmitted binary coded decimal is stored in a latch,
- generating a pulse to a delay timing circuit upon the operation of a switch,
- transmitting a delayed signal from said delay timing circuit to produce a timed sequence of signals selected to be transmitted to said selected latches subsequent to the storage of the binary coded decimals in said latches,
- transmitting the stored binary coded decimals in each of said latches to a decoding circuit and to a circuit for sending the binary coded decimals to a microprocessor,
- decoding the stored binary coded decimals in the decoding circuit to read out the potential levels to segments of a light emitting diode,
- operating one of the switches to electrically connect said switch to said sending circuit for transmitting a signal to said sending circuit upon operation of said switch,
- depositing the binary coded decimal stored in said sending circuit on an electrical connection to a microprocessor upon transmission of said signal from said switch,
- operating said microprocessor operative for executing a program stored in a second memory,
- storing in said second memory at least one access code of a preselected code of symbols consisting of at least one alphanumeric character and at least one matrix coefficient,
- sequentially entering to said microprocessor pulses defining said actuated code of symbols,
- comparing in the microprocessor the binary coded decimal produced by the operation of the sending circuit,
- and providing a delay in the operation of one or more of said steps.
23 more elements
Dependencies are inferred from the claim text.