Reference voltage generator device
AssigneeHitachi, Ltd.
InventorsKanji Yoh, Osamu Yamashiro, Satoshi Meguro, Koichi Nagasawa, Kotaro Nishimura, Harumi Wakimoto, Kazutaka Narita
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AssigneeHitachi, Ltd.
InventorsKanji Yoh, Osamu Yamashiro, Satoshi Meguro, Koichi Nagasawa, Kotaro Nishimura, Harumi Wakimoto, Kazutaka Narita
Estimating the term…
This reference voltage generator device detects a voltage corresponding to an energy gap of a semiconductor, or a voltage of a value close thereto, or a voltage based on an energy level of a semiconductor, and generates the detected voltage as a reference voltage. The reference voltage is generated by detecting a difference of threshold voltages of first and second insulated gate field-effect transistors (IGFETs). Gate electrodes of the first and second IGFETs are formed on gate insulating films which are formed on different surface areas of an identical semiconductor substrate under substantially the same conditions. The gate electrodes of the first and second IGFETs are respectively made of two semiconductors which are selected from among a semiconductor of a first conductivity type, a semiconductor of a second conductivity type and an intrinsic semiconductor made of an identical semiconductor material, and which have Fermi energy levels of values different from each other. The channels of the first and second IGFETs have an identical conductivity type. On the basis of a self-alignment structure, at least those parts of first and second polycrystalline semiconductor regions being the gate electrodes of the first and second IGFETs which are proximate to source and drain regions are doped with the same impurity as that of the source and drain regions, and a central part of one of the first and second polycrystalline semiconductor regions is doped with an impurity of a selected one of the first conductivity type and the second conductivity type.
A reference voltage generator device comprising:
A reference voltage generator device comprising:
A reference voltage generator device comprising:
A reference voltage generator device comprising:
A reference voltage generator device comprising:
A reference voltage generator device comprising:
A reference voltage generator device comprising:
A reference voltage generator device comprising:
A reference voltage generator device comprising first and second insulated gate field-effect transistors which have a difference of threshold voltages corresponding to a difference of Fermi levels of gate electrodes thereof, one of said first and second insulated gate field-effect transistors being diode-connected so that at least its gate and drain may be coupled D.C.-wise, the difference of said threshold voltages of both the insulated gate field-effect transistors being utilized, wherein said first and second insulated gate field-effect transistors are diode-connected with the respective gates and drains coupled D.C.-wise, and wherein a capacitor is connected between the respective drains of said first and second insulated gate field-effect transistors, and a third insulated gate field-effect transistor which is driven by a clock pulse is connected to said first insulated gate field-effect transistor.
A reference voltage generator device comprising first and second insulated gate field-effect transistors which have a difference of threshold voltages corresponding to a difference of Fermi levels of gate electrodes thereof, one of said first and second insulated gate field-effect transistors being diode-connected so that at least its gate and drain may be coupled D.C.-wise, the difference of said threshold voltages of both the insulated gate field-effect transistors being utilized, wherein said first and second insulated gate field-effect transistors are diode-connected with the respective gates and drains coupled D.C.-wise, and wherein a third insulated gate field-effect transistor which is driven by a first clock pulse, a fourth insulated gate field-effect transistor which is driven by a second clock pulse, and a capacitor, the respective drains of said first and second insulated gate field-effect transistors being connected to said third insulated gate field-effect transistor in common, said capacitor being connected between respective sources of said first and second insulated gate field-effect transistors, the source of said first insulated gate field-effect transistor being connected to said fourth insulated gate field-effect transistor.
Dependencies are inferred from the claim text.