Method for reducing or eliminating interface defects in mismatched semiconductor epilayers

A process for eliminating or substantially reducing the defect density at the interface of a mismatched crystal lattice semiconductor material structure comprising a first semiconductor material layer and a second semiconductor material layer deposited on said first semiconductor material and forming an interface therewith, said process comprising:

• a) forming a first semiconductor layer;
• b) patterning the first semiconductor layer to form a multiplicity of pillars and adjacent wells prior to deposit of the second layer thereon, said pillar, well and said second layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m;
• the height of said pillar and said well being sufficient to accept the second layer deposit in a thickness in excess of the critical thickness;
• c) depositing discontinuously a second semiconductor layer on said pillars and wells to form a discontinuous layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m and a thickness in excess of the critical thickness in the range of from about 10.ANG. to about 500 .mu.m to provide a mismatched semiconductor composite having an interface substantially free of interface defects;
• wherein said mismatched semiconductor composite comprises GaAs on Si or its inverse.

A process for eliminating or substantially reducing the defect density at the interface of a mismatched crystal lattice semiconductor material structure comprising a first semiconductor material layer and a second semiconductor material layer deposited on said first semiconductor material and forming an interface therewith, said process comprising:

• a) forming a first semiconductor layer;
• b) patterning the first semiconductor layer to form a multiplicity of pillars and adjacent wells prior to deposit of the second layer thereon, said pillar, well and said second layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m;
• the height of said pillar and said well being sufficient to accept the second layer deposit in a thickness in excess of the critical thickness;
• c) depositing discontinuously a second semiconductor layer on said pillars and wells to form a discontinuous layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m and a thickness in excess of the critical thickness in the range of from about 10.ANG. to about 500 .mu.m to provide a mismatched semiconductor composite having an interface substantially free of interface defects;
• wherein said mismatched semiconductor composite comprises In.sub.x Ga.sub.1-x As on In.sub.y GA.sub.1-y As and wherein x and y have a value from 0 to 1 and x is not equal to y.

A process for eliminating or substantially reducing the defect density at the interface of a mismatched crystal lattice semiconductor material structure comprising a first semiconductor material layer and a second semiconductor material layer deposited on said first semiconductor material and forming an interface therewith, said process comprising:

• a) forming a first semiconductor layer;
• b) patterning the first semiconductor layer to form a multiplicity of pillars and adjacent wells prior to deposit of the second layer thereon, said pillar, well and said second layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m;
• the height of said pillar and said well being sufficient to accept the second layer deposit in a thickness in excess of the critical thickness;
• c) depositing discontinuously a second semiconductor layer on said pillars and wells to form a discontinuous layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m and a thickness in excess of the critical thickness in the range of from about 10.ANG. to about 500 .mu.m to provide a mismatched semiconductor composite having an interface substantially free of interface defects;
• wherein said mismatched semiconductor composite comprises Si.sub.x Ge.sub.1-x on Si or its inverse and wherein x has a value between 0 and 1.

A process for eliminating or substantially reducing the defect density at the interface of a mismatched crystal lattice semiconductor material structure comprising a first semiconductor material layer and a second semiconductor material layer deposited on said first semiconductor material and forming an interface therewith, said process comprising:

• a) forming a first semiconductor layer;
• b) patterning the first semiconductor layer to form a multiplicity of pillars and adjacent wells prior to deposit of the second layer thereon, said pillar, well and said second layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m;
• the height of said pillar and said well being sufficient to accept the second layer deposit in a thickness in excess of the critical thickness;
• c) depositing discontinuously a second semiconductor layer on said pillars and wells to form a discontinuous layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m and a thickness in excess of the critical thickness in the range of from about 10.ANG. to about 500 .mu.m to provide a mismatched semiconductor composite having an interface substantially free of interface defects;
• wherein said mismatched semiconductor composite comprises GaAs on Si.sub.x Ge.sub.1-x or its inverse, wherein x has a value between 0 and 1.

A process for eliminating or substantially reducing the defect density at the interface of a mismatched crystal lattice semiconductor material structure comprising a first semiconductor material layer and a second semiconductor material layer deposited on said first semiconductor material and forming an interface therewith, said process comprising:

• a) forming a first semiconductor layer;
• b) patterning the first semiconductor layer to form a multiplicity of pillars and adjacent wells prior to deposit of the second layer thereon, said pillar, well and said second layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m;
• the height of said pillar and said well being sufficient to accept the second layer deposit in a thickness in excess of the critical thickness;
• c) depositing discontinuously a second semiconductor layer on said pillars and wells to form a discontinuous layer having a lateral dimension from about 2 .mu.m to about 5000 .mu.m and a thickness in excess of the critical thickness in the range of from about 10.ANG. to about 500 .mu.m to provide a mismatched semiconductor composite having an interface substantially free of interface defects;
• wherein said mismatched semiconductor composite comprises layers of ZnSe and GaAs.