Rail-to-rail input stage of an operational amplifier

An amplifier responsive to first and second input signals applied at first and second inputs for provident an output signal, comprising:

• a first differential input stage having first and second inputs coupled for receiving the first and second input signals for conducting first and second currents through first and second outputs;
• first current supply means having first and second outputs coupled to said first and second outputs of said first differential input stage at first and second nodes respectively;
• a first current mirror circuit having an input coupled to said first node and having an output coupled to said second node for providing the output signal of the amplifier at said second node;
• and
• circuit means coupled to said first and second inputs of said first differential input stage for preventing phase inversion of the output signal should the first and second input signals be driven beyond a predetermined threshold, said circuit means including,
• (a) a first transistor having a collector, a base and an emitter, said emitter being coupled to said first input of said first differential input stage, said base being coupled to said first output of said first differential input stage, said collector being coupled to said first node, and
• (b) a second transistor having a collector, a base and an emitter, said emitter being coupled to said second input of said first differential input stage, said base being coupled to said second output of said first differential input stage, said collector being coupled to said second node.

An input stage of an operational amplifier responsive to first and second input signals applied at first and second inputs for providing an output signal, said input stage comprising:

• first switching means responsive to the first and second input signals when operating below a predetermined threshold for conducting first and second currents through first and second outputs;
• second switching means responsive to the first and second input signals when operating above said predetermined threshold for conducting firs and second currents through first and second outputs;
• first current supply means having first and second outputs coupled to said first and second outputs of said first switching mean at first and second nodes respectively;
• second currant supply means having first and second outputs coupled to said first and second outputs of said second switching means at said first and second nodes respectively;
• a current mirror circuit having an input coupled to said first node and having an output coupled to said second node for providing the output signal of the input stage at said second node;
• and
• circuit means having first and second inputs coupled to said first and second nodes for cancelling current variation induced by voltage changes at said second node, said circuit means including,
• (a) a first transistor having a collector, a base and an emitter, said collector being coupled to a first source of operating potential, said base being coupled to said first output of said second current supply means,
• (b) a second transistor having a collector, a base and an emitter, said collector being coupled to said emitter of said first transistor, said base being coupled to said second node, and
• (c) a first resistor coupled between said emitter of said second transistor and a second source of operating potential.

In an operational amplifier an input stage responsive to first and second input signals for providing an output signal, said input stage comprising:

• first switching means responsive to the first and second input signals when operating below a predetermined threshold for conducting first and second currents through fist and second outputs;
• a first active current load having first and second outputs coupled to said first and second outputs of said first switching means respectively;
• a first current mirror circuit having an input at a first node and having an output at a second node for providing the output signal of the input stage;
• first and second transistors each having a collector, a base and an emitter, said emitters being coupled to said first and second outputs of said first active current load, said bases being coupled together for receiving a fist bias potential, said collectors being coupled to said first and second nodes respectively;
• second switching means responsive to the first and second input signals when operating above said predetermined threshold for conducting first and second currents through first and second outputs;
• a second active current load having first and second outputs coupled to said first and second outputs of said second switching means respectively;
• and
• third and fourth transistors each having a collector, a base and an emitter, said emitters being coupled to said first and second outputs of said second active current load, said bases being coupled together for receiving a second bias potential, said collectors being coupled to said first and second nodes respectively.