Sigma-delta oversampled analog-to-digital converter network with chopper stabilization

In an oversampling analog-to-digital converter having a sigma-delta modulator followed in cascade by a decimation filter;

• the decimation filter supplying digital output signals for said oversampling analog-to-digital converter at an output rate that is a submultiple 1/R of an oversampling rate at which digital samples of an input signal for said decimation filter are supplied, R being an integer at least four;
• the sigma-delta modulator having therewithin a chopper-stabilized amplifier connected as a Miller integrator for generating an integrator output signal that is the time integral of an error signal, means for quantizing said integrator output signal to generate at an oversampling rate digital samples of the input signal for said decimation filter, a digital-to-analog converter for generating an analog feedback signal corresponding to the digitized input signal for said decimation filter, and means for differentially combining said analog feedback signal with an analog input signal for said oversampling analog-to-digital converter thereby to generate said error signal;
• the oversampling rate of said oversampling analog-to-digital converter being sufficiently high that operating said chopper-stabilized amplifier at a chopping rate equal to half the oversampling rate would tend to cause an unacceptable high distortion of the digital output signals of said decimation filter owing to non-linearity arising from the settling of the chopper-stabilized amplifier after each switching thereof;
• an improvement wherein the chopping rate in said chopper-stabilized amplifier is chosen to be an even submultiple less than one half of said oversampling rate, thereby to keep within an acceptably low level of amplitude in the frequency baseband any distortion of the digitized input signal for said decimation filter, and wherein the chopping rate in said chopper-stabilized amplifier is chosen to be higher than said output rate, thereby to keep 1/f noise within said acceptable low level of amplitude in the frequency baseband, thus to make available more bits of resolution from said oversampling analog-to-digital converter than if said chopping rate were equal to the output rate or to half the oversampling rate.

A method for operating a sigma-delta modulator as an oversampling analog-to-digital converter, the sigma-delta modulator having therewithin a chopper-stabilized amplifier connected as a Miller integrator for generating an integrator output signal that is the time integral of an error signal, means for quanitizing said integrator output signal to generate at an oversamplng rate digital samples of the integrator output signal, a digital-to-analog converter for generating an analog feedback signal corresponding to the digital samples of the integrator output signal, and means for differentially combining said analog feedback signal with an analog input signal for said oversampling analog-to-digital converter thereby to generate said error signal, said chopper-stabilized amplifier having associated therewith a time for setting said method comprising the steps of:

• operating said means for quanitizing said integrator output signal at an oversampling rate, the periodicity of which is not appreciably longer than said time for settling;
• connecting in cascade after said sigma-delta modulator a decimation filter for generating digital output signals for said oversampling analog-to-digital converter, responsive to the digital samples of the integrator output signal, said decimation filter being of a type for supplying said digital output signals at an output rate that is submultiple of said oversampling rate, which digital output signals are accompanied by 1/f noise;
• and
• operating said chopper-stabilized amplifier at a chopping rate that is an even submultiple less than one half of said oversampling rate, the periodicity of said chopper rate being appreciably longer than said time for settling for keeping the amplitude of distortion accompanying said digital output signals and arising from the settling of the chopper-stabilized amplifier after each switching thereof below an acceptable level.