Fully differential operational amplifier having frequency dependent impedance division

A fully differential Field Effect Transistor (FET) operational amplifier comprising:

• first and second differential input terminals and first and second differential output terminals;
• first and second FETs (M1,M2) of first conductivity type, the sources of said first and second FETs being electrically connected together, the gate of said first FET being electrically connected to said first differential input terminal and the gate of said second FET being electrically connected to said second differential input terminal;
• third and fourth FETs (M5, M6) of second conductivity type the source of said third FET being electrically connected to the drain of said first FET and the drain of said third FET being electrically connected to said second output terminal, the source of said fourth FET being electrically connected to the drain of said second FET and the drain of said fourth FET being electrically connected to said first output terminal;
• fifth and sixth FETs (M7,M8) of said second conductivity type, the source of said fifth FET being electrically connected to the drain of said second FET and the source of said sixth FET being electrically connected to the drain of said first FET;
• and
• first and second cascoded current mirrors, each having an input and an output, the input of said first cascoded current mirror being electrically connected to the drain of said fifth FET, and the output of said first cascoded current mirror being connected to the drain of said third FET;
• the input of said second cascoded current mirror being electrically connected to the drain of said sixth FET, and the output of said second cascoded current mirror being connected to the drain of said fourth FET.

A fully differential Field Effect Transistor (FET) operational amplifier comprising:

• first and second differential input terminals and first and second differential output terminals;
• first and second FETs (M1,M2) of first conductivity type, the sources of said first and second FETs being electrically connected together, the gate of said first FET being electrically connected to said first differential input terminal and the gate of said second FET being electrically connected to said second differential input terminal;
• third and fourth FETs (M5, M6) of second conductivity type the source of said third FET being electrically connected to the drain of said first FET and the drain of said third FET being electrically connected to said second output terminal, the source of said fourth FET being electrically connected to the drain of said second FET and the drain of said fourth FET being electrically connected to said first output terminal;
• fifth and sixth FETs (M7,M8) of said second conductivity type, the source of said fifth FET being electrically connected to the drain of said second FET and the source of said sixth FET being electrically connected to the drain of said first FET;
• first and second cascode FETs (M9,M10) of said first conductivity type said first cascode FET being electrically connected to the drain of said third FET, and said second cascode FET being electrically connected to the drain of said fourth FET, for loading said third and fourth FETs;
• and
• first and second diode-connected FETs (M11, M12) of said first conductivity type, said first diode-connected FET being electrically connected to the drain of said fifth FET, and said second diode-connected FET being connected to said sixth FET, for loading said fifth and sixth FETs.

An amplifier comprising:

• a transconductance amplifier having an input and an output, for receiving an input voltage at the input thereof and for converting said input voltage to an input current at the output thereof;
• frequency dependent current dividing means having an input, a noninverting output and an inverting output, the output of said transconductance amplifier being electrically connected to the input of said frequency dependent current dividing means, the noninverting output forming an amplifier output terminal, and the inverting output being connected to a reference voltage;
• and
• current feedback buffer means, the input of which is electrically connected to said amplifier output terminal, and the output of which is electrically connected to said input of said frequency dependent current dividing means.