Circuit for generating internal supply voltage

A circuit receiving an external supply voltage, for generating an internal supply voltage lower than the external supply voltage, for use in semiconductor memory device, comprising:

• reference voltage generator means connected to receive said external voltage, for generating a reference voltage;
• comparator means having first and second input terminals respectively coupled to receive said reference voltage and a feedback voltage, for comparing voltages applied at said first and second input terminals to generate an intermediate voltage;
• output means coupled to receive said intermediate voltage, for generating said internal supply voltage in dependence upon said intermediate voltage;
• and
• voltage sharing means coupled to receive said internal supply voltage, for providing said feedback voltage, whereby decreases in said feedback voltage enable said internal supply voltage to increase in response to increase in temperature of said semiconductor memory device.

A circuit for supplying internal voltage for a semiconductor memory device, comprising:

• reference voltage generator means for generating a reference voltage in dependence upon an external voltage source, said reference voltage being substantially constant and independent of temperature variations;
• comparator means for comparing said reference voltage with a feedback voltage to provide an intermediate voltage;
• output means for providing said internal voltage for said semiconductor memory device in dependence upon said intermediate voltage;
• and
• voltage divider means coupled to receive said internal voltage, for changing said internal voltage in dependence upon temperature variations of said semiconductor memory device by generating said feedback voltage to said comparator means, said feedback voltage being inversely varied with said temperature variations, said voltage divider means comprising:
• a first metal oxide semiconductor transistor having a source coupled to receive said internal voltage;
• and
• a second metal oxide semiconductor transistor having a drain and a gate connected to ground, and a source connected to a gate and a drain of said first metal oxide semiconductor transistor forming an output node for generating said feedback voltage, said first metal oxide semiconductor transistor further having a greater channel resistance value than said second metal oxide semiconductor transistor.