Power conservation in microprocessor controlled devices

A method for controlling a multiprocessor system including a first processor having a first central processing unit operating under stored program control, and operating at a first speed and at a first power supply voltage or at a second power supply voltage which is greater than said first power supply voltage, and a second processor having a second central processing unit operating under stored program control, and operating at one of a plurality of second speeds at said second power supply voltage and a power supplying means for supplying said first and second power supply voltages in said first and second processors, said method comprising the steps of:

• operating said first processor at said first speed and at said first power supply voltage;
• determining whether a task is to be performed by said second processor;
• controlling said power supplying means to provide said second voltage to said first and said second processor if a task is to be performed by said second processor;
• activating said second processor if a task is to be performed by said second processor;
• identifying the task to be performed by said second processor;
• initiating execution of a software routine for performing the identified task;
• identify one of said plurality of second speeds corresponding with the activated software routine;
• and
• operating said second processor at the identified one of said plurality of second speeds for performing the task.

A multiprocessor system comprising:

• a first processor having a first central processing unit operating under stored program control and operating at a first speed and at a first power supply voltage or at a second power supply voltage which is greater than said first power supply voltage for performing first tasks;
• a second processor having a second central processing unit operating under stored program control, and operating at a second speed which is greater than said first speed and at said second power supply voltage, said first processor including means for activating said second processor for performing second tasks at said second speed,
• power supplying means for supplying power to said first and second processors;
• and
• power supply control means, connected to said means for activating said second processor and to said power supply means, for controlling said power supplying means to provide said second power supply voltage to said first and second processors when said second processor is activated.

A multiprocessor system comprising:

• a first processor having a first central processing unit operating under stored program control, and operating at a first power supply voltage level or at a second power supply voltage level which is greater than said first power supply voltage level for performing a first task;
• a second processor having a second central processing unit operating under stored program control, and operating at said second power supply voltage level for performing a second task;
• power supplying means for providing said first power supply voltage level to said first processor and for selectively providing said second power supply voltage level to said second processor;
• and
• means for controlling said power supplying means to provide said second power supply voltage level to said first and second processors when said second task is performed.

A data processing system comprising:

• a first stored program processor;
• a variable speed clock connected to said first processor, for operating said first processor at a plurality of speeds;
• a plurality of stored program routines for controlling said first processor to perform a plurality of tasks;
• a second stored program processor, said second processor including means for activating said first processor for performing said plurality of tasks;
• a plurality of stored speed data, each of which corresponds to one of said plurality of speeds a respective one of which correspond with a respective one of said stored program routines;
• means for selecting one of said stored program routines to be performed and the corresponding one of said stored speed data;
• and
• means for controlling said variable speed clock to operate said first processor at said one of said plurality of which corresponds with the selected one of said stored program routines.

A multiprocessor system comprising:

• a first processor having a first central processing unit operating under stored program control, and operating at a first speed at a first power supply voltage or at a second power supply voltage which is greater than said first power supply voltage;
• a second processor having a second central processing unit operating under stored program control, and operating at a selected one of a plurality of second speeds, at said second power supply voltage;
• a power supplying means for providing said first power supply voltage to said first processor and selectively providing said second power supply voltage to said second processor;
• means in said first processor for performing background tasks;
• means in said first processor for determining that a foreground task is to be performed;
• means, responsive to said determining means, for controlling said power supply to provide said second power supply level to said second processor;
• means, responsive to said determining means, for activating said second processor to perform foreground tasks;
• a plurality of stored program routines for controlling said second processor to perform foreground tasks, each of said routines having one of said plurality of second speeds corresponding therewith;
• means for selecting one of said stored program routines to be performed;
• and
• means for operating said second processor at said one of said plurality of speeds corresponding with the selected one of said stored program routines, whereby power consumption in said multiprocessor system is minimized.