Altered-length messages in interrupted-clock transmission systems

In a system using a transmission channel means for carrying sequential timing messages from a transmitting station to a receiving station, wherein said timing messages each consist of an interval containing clocks, said interval containing clocks being of duration equal to W.sub.i cycles of an oscillator associated with the transmitting station, and an interval without clocks, said interval without clocks being of duration equal to m cycles of said oscillator associated with the transmitting station, where W.sub.i is any one of a set of positive integers and m is a positive integer, a receiving station apparatus which comprises:

• apparatus for detecting the commencement of said interval without clocks;
• apparatus for detecting the commencement of said interval containing clocks;
• and
• altered-length detection apparatus which includes means for producing an output signal in response to the occurance of said interval containing clocks for which said integer W.sub.i is not equal to a positive integer N, whereby an external device may be informed that the clock-containing interval did not contain exactly N clocks.

In a system using a transmission channel means for carrying sequential timing messages from a transmitting station to a receiving station, wherein said timing messages each consist of an interval containing clocks, said interval containing clocks being of duration equal to W.sub.i cycles of an oscillator associated with the transmitting station, where W.sub.i is any one of a set of positive integers, and where the average of the values of said integers W.sub.i over the preceding T messages approaches the value of a positive integer N as T is increased, T being a variable positive integer, and an interval without clocks, said interval without clocks being of duration equal to m cycles of said oscillator associated with the transmitting station, m being a positive integer, a timing recovery apparatus connected to said transmission channel means and comprising:

• a phase-frequency detector circuit;
• a variable oscillator with at least one frequency control input;
• a modulo N divider circuit, with input connected to said transmission channel means and with output connected to one input of said phase-frequency detector circuit, N being said positive integer;
• and
• a modulo (N+m) divider circuit, with input connected to the output of said variable oscillator and with output connected to another input of said phase-frequency detector circuit, N and m being said positive integers;
• the output of said phase-frequency detector circuit being connected to the frequency control input of said variable oscillator so as to cause said variable oscillator to operate at a frequency such that the difference between the frequency of said variable oscillator and the frequency of said oscillator associated with the transmitting station approaches zero as said average of the values of said integers W.sub.i approaches said value of said integer N.