Memory management system and method for network controller
AssigneeAdvanced Micro Devices, Inc.
InventorFarzin Firoozmand
Life of this patent
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AssigneeAdvanced Micro Devices, Inc.
InventorFarzin Firoozmand
Estimating the term…
Transmit and receive data are stored in buffer regions defined in first and second memories of a system residing on a network. The buffer regions are pointed to by multiple descriptor rings that are also stored in the memories. In accordance with one aspect of the invention, the two memories reside on separate buses connected to a common bus containing a processor. The processor communicates with one or the other of the memories using a handshaking protocol. In accordance with another aspect of the invention, receive data incoming to the systems is scattered among multiple descriptor rings. A further aspect splits a frame among multiple descriptors depending on a characteristic code carried by the frame, e.g., in a frame control field. The size of the first descriptor, smaller than that of the others, is programmed to correspond to the size of the header of each frame. Synchronization between headers and data of a frame is maintained by a frame number stored in each descriptor. Another aspect prevents blocking of the receive path upon occurrence of a blocked receive descriptor ring. One application of the invention is in a fiber distributed data interface (FDDI).
For a network adapter including a plurality of processors and at least first and second memories for storing data arranged in frames, a network controller, comprising:
For a fiber distributed digital interface (FDDI) network including host and node processors having respectively first and second memories for storing data arranged in frames, a network controller, comprising:
For a network including a plurality of processors and at least first and second memories for storing in buffers receive data arranged in frames, a network controller, comprising:
For a network including a plurality of processors and at least first and second memories for storing in buffers receive data arranged in frames each having a header portion and a data portion, a network controller, comprising:
For a network including a plurality of processors and memory means for storing packets of receive data arranged in frames and including information identifying a frame characteristic, a network controller, comprising:
For a network including a buffer memory, a plurality of processors and memory means for storing packets of data arranged in frames, a network controller, comprising:
For a network adapter including a plurality of processors and memory means for storing packets of receive data arranged in frames and including information identifying a frame characteristic, a FIFO memory and a receive data flow path through said FIFO memory to said memory means, means for establishing a plurality of receive buffers at arbitrary locations in said memory means and for establishing at contiguous locations in said memory means descriptors forming descriptor rings pointing to said receive buffers, and means for supplying receive frames incoming on said receive data path to a descriptor ring corresponding to said frame characteristic, a method of controlling receive data flow, comprising the steps of:
For a network adapter operative selectively in normal and discard modes including a plurality of processors and memory means for storing packets of receive data arranged in frames and including information identifying a frame characteristic, a FIFO memory and a receive data flow path through said FIFO memory to said memory means, means for establishing a plurality of receive buffers at arbitrary locations in said memory means and for establishing at contiguous locations in said memory means descriptors forming descriptor rings pointing to said receive buffers, and means for supplying receive frames incoming on said receive data path to a descriptor ring corresponding to said frame characteristic, a method of controlling receive data flow, comprising the steps of:
For a fiber distributed digital interface (FDDI) network including host and node processors having respectively first and second memories for storing data arranged in frames each including a frame control field, a method of processing receive frames, comprising the steps of:
For a network adapter including a plurality of processors and at least first and second memories for storing in buffers receive data arranged in frames, a method of processing receive frames, comprising the steps of:
For a network adapter including a plurality of processors and at least first and second memories for storing in buffers receive data arranged in frames each having a header portion and a data portion, a method of processing receive frames, comprising the steps of:
For a network adapter including a plurality of processors and at least first and second memories for storing data arranged in frames, a method of processing frames of receive data, comprising the steps of:
For a fiber distributed digital interface (FDDI) network including host and node processors having respectively first and second memories for storing data arranged in frames each including a frame control field, a method of processing frames of receive data, comprising the steps of:
Dependencies are inferred from the claim text.