Delta sigma modulator having programmable gain/attenuation

A delta sigma modulator, comprising:

• a) an integrating amplifier circuit comprising:
• 1) an integration capacitor having first and second electrical leads;
• and
• 2) an amplifier, wherein the output of the amplifier is connected to the first electrical lead of the integration capacitor, and an input of the amplifier is connected to the second electrical lead of the integration capacitor;
• b) a first switched capacitor circuit comprising:
• 1) a first input terminal for receiving an analog input;
• 2) means responsive to at least one control signal for controlling the charging of a first sampling capacitor to the level of an analog input voltage and for controlling the discharging of the first sampling capacitor to the integration capacitor so that the analog input is sampled at a first rate;
• c) a second switched capacitor circuit, comprising:
• 1) a second input terminal for receiving a known reference voltage;
• 2) means responsive to at least one control signal for controlling the charging of a second sampling capacitor to the level of a known reference voltage and for controlling the discharging of said second sampling capacitor to the integration capacitor so that the reference voltage is sampled at a second rate;
• and
• d) control means for generating said control signals which control the rates of sampling to generate a level of gain specified by a gain selection decision communicated to the control means.

A method of realizing gain in a delta sigma modulator, said delta sigma modulator having, a means for sampling an input, a means for sampling a fixed voltage and an integrating amplifier circuit having an amplifier and an integration capacitor wherein a first electrical lead of the integration capacitor is coupled to the output of the amplifier and a second electrical lead of the capacitor is coupled to an input of the amplifier, comprising the steps of:

• a) sampling an analog input to charge packets of input and transferring the charge packets of input to the integration capacitor at a first rate;
• b) sampling the fixed voltage to produce fixed charge packets and transferring the fixed charge packets to the integration capacitor at a second rate to induce gain;
• and
• c) producing an output from the integrating amplifier indicative of the amount of charge transferred to the integration capacitor.

A delta sigma modulator, comprising:

• a) an integrating amplifier circuit, having an amplifier and an integration capacitor, for producing an output indicative of an amount of charge held on said capacitor, wherein the output of the integration capacitor is coupled to a first electrical lead of the integration capacitor and the second electrical lead of the integration is coupled to an input of the amplifier;
• b) means for sampling an input to produce packets of charge of input and for transferring said packets of charge of input to the integration capacitor;
• c) means for sampling a fixed voltage to produce fixed packets of charge and for transferring said fixed packets of charge to the integration capacitor;
• and
• d) an adjustable control means for controlling how many of packets of charge of input are sent to the integration capacitor of the integrating amplifier circuit and how many fixed packets of charge are sent to the integration capacitor.

A delta sigma modulator for converting analog input into digital output, comprising:

• a) an integrating amplifier circuit, having an integration capacitor, for producing output indicative of an amount of charge held on the integration capacitor;
• b) means for sampling the analog input to produce analog input packets of charge and transferring said analog input packets of charge to said integration capacitor, said means for sampling the analog input receiving a first control signal that dictates how many analog input charge packets are transferred to the integration capacitor over a predetermined time;
• c) means for sampling the reference voltage to produce reference packets of charge and for transferring said reference packets of charge to said integration capacitor, said means for sampling the reference voltage receiving a second control signal that dictates how many reference charge packets are transferred to the integration capacitor over the predetermined time;
• and
• d) control means for generating said control signals so that a fixed ratio of analog input charge packets to reference charge packets is sent to the integration capacitor over the predetermined time to effect a level of gain, said level of gain being communicated to said control means.