US 5,132,685 AGranted

Built-in self test for analog to digital converters

AssigneeAT&T Bell Laboratories

InventorsMichael R. DeWitt, George F. Gross, Jr., R. Ramachandran

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Abstract

An integrated circuit having an analog-to-digital converter includes built-in self-test (BIST) circuitry. The BIST circuitry checks for monotonicity, and typically also that all possible codes are present, by applying a ramp voltage to the A/D input, while a state machine monitors the output. The state machine can check to ensure that the output increases by only one least significant bit (LSB) each time the output changes. A counter may be checked at the end of the test, to ensure that all the possible codes are obtained. The BIST circuitry may be activated, and the results monitored, through package terminals after the chip is packaged, thereby allowing for boundary scan testing. The inventive technique may be used to save testing costs during manufacture. In addition, system diagnostics in the field can become more cost effective.

Claims8

Dependent claims

An integrated circuit including an analog to digital converter that converts an analog signal into an n-bit digital output code,

characterized in that said integrated circuit further includes self-test means comprising:
means for providing a monotonic ramp voltage input signal during a test;
and
finite state means for determining whether successive digital output codes differ from the previous value by less than a specified amount during said test, wherein said finite state means comprises:
a present code register for storing a given n-bit output code;
a previous code register for storing the n-bit output code previous to said given output code;
and
first comparator means for comparing the contents of the present and previous code registers in order to determine whether a code immediately following any given code differs from the given code by more than one least significant bit, in which case a fail signal is generated, wherein said finite state means further determines whether any given code reverts one least significant bit to a previous code in each of two conversions immediately following the given code, in which case a fail signal is generated.

5 more elements

An electronic system comprising a multiplicity of integrated circuits at least a given one of which has test means for performing a built-in self-test, wherein said system includes means for activating said test means, and further includes means for receiving the test results produced by said test means, with the given integrated circuit including an analog to digital converter that converts an analog signal into an n-bit digital output code,

characterized in that said test means comprises:
means for providing a monotonic ramp voltage input signal to said analog to digital converter during a test;
and finite state means for determining whether successive digital output codes from said analog to digital converter differ from the previous value by less than a specified amount during said test, wherein said finit state means comprises:
a present code register for storing a given n-bit output code;
a previous code register for storing the n-bit output code previous to said given output code;
and
first comparator means for comparing the contents of the present and previous code registers in order to determine whether a code immediately following any given code differs from the given code by more than one least significant bit, in which case a fail signal is generated, wherein said finite state means further determines whether any given output code reverts one least significant bit to a previous code in each of two conversions immediately following the given code, in which case a fail signal is generated.

4 more elements

Dependencies are inferred from the claim text.