US 5,132,640 AGranted

Differential current amplifier circuit

AssigneeKabushiki Kaisha Toshiba

InventorsTatsuo Tanaka, Makoto Kubo

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Abstract

A differential current amplifier circuit having first and second transistors (Q1, Q2) whose collectors are supplied with first and second input signals (INA, INB), respectively, and first and second resistors (R1, R2) connected between the base and the collector of each of the transistors. When the resistors have the same resistance and the signals (INA, INB) are inputted to the input terminals, the potential of the common base node of the first and second transistors goes to a substantially ground potential, and the signal current component (i) does not flow through the first and second transistors. Thus, only DC currents (2I, 2nI) which are not superposed by the signal current component (i) flow through third and fourth transistors connected in a current mirror fashion, and an additional DC current source is not needed at this portion. Furthermore, the fourth transistor (Q4) is used as a constant current source of a differential pair constituted by fifth and sixth transistors (Q5, Q6), and an amplified signal component (2i.sub.2) is obtained from the output terminal (OUT) of the differential pair. Thus, a large current gain is obtained.

Claims2

Dependent claims

A differential current amplifier circuit comprising first to sixth bipolar transistors of the same polarity, first and second resistors, characterized in that:

said first and second bipolar transistors have their emitters connected to each other;
said first and second resistors are coupled between the collector-base path of said first bipolar transistor and that of said second bipolar transistor
the base and collector of said third bipolar transistor are connected together, and the collector-emitter path thereof is connected between the emitter node of the first and second bipolar transistors and a predetermined potential terminal;
the base and emitter of said fourth bipolar transistor are connected to the base and emitter of said third bipolar transistor, respectively;
said fifth and sixth bipolar transistors have their emitters connected to each other, the node of which is coupled to the collector of the fourth bipolar transistor;
the bases of said fifth and sixth bipolar transistors are connected to the the collectors of said second and first bipolar transistors, respectively;
the collectors of said fifth and sixth bipolar transistors are coupled to the a second output terminal and a first output terminal, respectively;
and
said first and second bipolar transistors have their bases connected together, and their collectors connected to a first signal input terminal and a second signal input terminal, respectively, or have their collectors connected together, and their bases connected to the first and second signal input terminals, respectively.

6 more elements

Dependencies are inferred from the claim text.