Voltage comparator with automatic output-level adjustment

A differential voltage comparator responsive to digital input signals for accurately driving integrated circuit digital logic, with the output voltage of the comparator being matched to the input switching point of the digital logic whenever V.sub.IN and NOT V.sub.IN input signals to said comparator are equal in voltage with zero differential between them, even in the presence of temperature, operating voltage and processing variations, said comparator comprising:

• a first voltage rail for connection to a source of operating voltage of one polarity;
• a second voltage rail for connection to a source of operating voltage of opposite polarity to said one polarity;
• a source of reference voltage;
• a first input terminal for receiving said input signal V.sub.IN ;
• a second input terminal for receiving said input signal NOT V.sub.IN ;
• a differential amplifier including first and second transistors each having main current paths with one end connected in common, and a control electrode for individually connecting to said first and second input terminals, respectively, and third and fourth transistors each having a main current path connected between said first voltage rail and individually to the other ends of the main current paths of said first and second transistors, respectively, said third and fourth transistors further having control electrodes individually connected to the other ends of the main current paths of said first and second transistors, respectively, said third and fourth transistors functioning as current sources or loads for their associated one of said first and second transistors, respectively;
• a first voltage level shifter, including:
• fifth transistor having a control electrode connected to the common connection of the main current paths of said first and third transistors, and the control electrode of said third transistor, said fifth transistor further including a main current path having one end connected to said first voltage rail,
• a sixth transistor having a control electrode connected in common with one end of a main current path to said second rail, and
• a first plurality of diodes connected in a series string between the other ends of said current paths of said fifth and sixth transistors, said diodes being polarized for passing current between said first and second rails in the same direction as current passing through said differential amplifier, the voltage drop across said plurality of diodes determining the amount of shift down in the output voltage of the side of said differential amplifier associated with said first transistor;
• a differential current source including:
• a seventh transistor having a main current with one end connected in common to the one ends of the main current paths of said first and second transistors, and a control electrode connected to the common connection between the other end of the main current path of said sixth transistor and said first plurality of diodes;
• an eighth transistor having a control electrode connected to the common connection of the one end of said first and second transistors, and a main current path with one end connected to said first rail;
• a ninth transistor having a control electrode, and a main current path with one end connected to the other end of the main current path of said eighth transistor;
• a tenth transistor having a control electrode and one end of a main current path connected in common to said second voltage rail, the other ends of the main current paths of said seventh, ninth, and tenth transistors being connected in common to one another;
• a voltage reference including:
• an eleventh transistor having a control electrode and one end of a main current path connected in common to said second voltage rail;
• a second plurality of diodes connected in a series string with one end to said source of reference potential, and
• another end in common to the control electrode of said ninth transistor and the other end of the main current path of said eleventh transistor;
• the diodes of said second plurality of diodes being polarized for passing current between said second voltage rail and said source of reference potential, in the same direction relative to said second voltage rail as current flowing through said differential amplifier;
• the voltage drop across said second plurality of diodes providing a reference voltage to the control electrode of said ninth transistor, said eleventh transistor providing a current source;
• a second voltage level shifter including:
• a twelfth transistor having a control electrode connected to the common connection of the control electrode of said fourth transistor and the main current paths of said second and fourth transistors, said twelfth transistor also having a main current path with one end connected to said first voltage rail;
• a thirteenth transistor having a control electrode and one end of a main current path connected to said second rail;
• a fourteenth transistor having a control electrode connected to the common connection of the control electrode of said seventh transistor with the other end of said sixth transistor and an end of said first plurality of series connected diodes;
• and
• a third plurality of diodes connected in a series string between to other ends of the main current paths of said twelfth and thirteenth transistors, said thirteenth transistor serving as a current source, said second voltage level shifter providing shifting down of the output voltage at the other side of said differential amplifier by the voltage drop across said third plurality of series connected diodes;
• an output terminal connected to the common connection between said third plurality of series connected diodes and the other end of said fourteenth transistor;
• the sum of the voltage drops of said second and third plurality of series connected diodes being made equal to the voltage drop across said first plurality of series connected diodes, said seventh and ninth transistors being matched to said digital logic gate being driven by said differential current source, with other parameters of said comparator being predetermined for insuring the output voltage of said comparator is matched to the input switching point of said digital logic when V.sub.IN is identical to NOT V.sub.IN.