US 5,126,742 A · Analog to digital converter with double folding interpolation circuitry

Abstract

An analog to digital converter (ADC) is disclosed having a coarse converter to generate the most significant bits of the output and double folding interpolation circuitry to generate the least significant bits. Each side of the double folding circuit includes additional folding stages coupled to reference voltages above and below the full scale input range of the ADC to cancel offset errors and improve circuit linearity. The interpolation circuit includes one interpolation stage, having two multiplier networks, for each least significant bit. Each interpolation stage receives two pairs of signals from the preceding stage and outputs two pairs of signals to the next stage. One of the pairs of output signals from each interpolation stage is also sent to a latched comparator. The outputs of all of the latched comparators can be read directly as the ADC output bits without requiring a decoder.

Claims16

Dependent claims

An ADC circuit for converting an analog input signal which varies over an input range into a digital code having a plurality of binary output bits, comprising:

folding circuitry including:
means for providing a plurality of first reference voltages which span the input range;
first folding means responsive to the analog input signal and said first reference voltages for generating a first folded signal and a second folded signal;
and
means for substantially reducing offset errors in said first and second folded signals, including:
means for providing a second reference voltage being less than the lowest of said first reference voltages;
second folding means coupled to said first folding means, said second folding means responsive to the analog input signal and said second reference voltage;
means for providing a third reference voltage being greater than the highest of said first reference voltages;
and
third folding means coupled to said first folding means, said third folding means responsive to the analog input signal and said third reference voltage;
interpolation circuitry coupled to said folding circuitry including:
a first interpolation stage for providing a first
output signal and a second output signal;
and
latching means responsive to said second output signal of said first interpolation stage for providing one of the binary output bits of the ADC circuit.

12 more elements

Dependencies are inferred from the claim text.

Analog to digital converter with double folding interpolation circuitry

Life of this patent

Analog to digital converter with double folding interpolation circuitry

Life of this patent

Abstract

Claims16