Integrated backplane interconnection architecture

A bus chip which implements communication between a plurality of modules, the bus chip comprising:

• a bus line;
• a plurality of bus driver/receiver means, coupled to the bus line, each bus driver/receiver means for a providing point-to-point link between a module from the plurality of modules and the bus line.

A bus backplane which electrically couples a plurality of modules, the bus backplane comprising:

• a plurality of integrated circuits, each of the plurality of integrated circuits including at least one bus line, and for each of the at least one bus line, the plurality of integrated circuits including a plurality of bus receivers and bus drivers which provide a point-to-point link to each of the plurality of modules.

A method for providing for data communication between a plurality of modules, the method comprising the steps of:

• (a) providing a plurality of bus lines within at least one integrated circuit;
• (b) connecting the plurality of modules to the plurality of bus lines through point-to-point links implemented using bus drivers and bus receivers included within the at least one integrated circuit and which provide an electrical interface between the plurality of bus lines and the plurality of modules.

A backplane which electrically couples a plurality of modules, the backplane coupling the modules together with a multi-bit interconnection topology, the backplane comprising:

• a plurality of integrated circuits, each integrated circuit in the plurality of integrated circuits including at least a one bit implementation of the interconnection topology, and for each of the at least one bit implementation, each of the integrated circuits including a plurality of interconnected receivers and interconnect drivers which provide a point-to-point link for each of the plurality of modules.

A backplane which electrically couples a plurality of modules, the backplane comprising:

• a plurality of integrated circuits, each of the plurality of integrated circuits including at least one bit of an interconnection topology, and for each of the at least one bit of the interconnection topology, the plurality of integrated circuits including a plurality of interconnect receivers and interconnect drivers which provide a point-to-point link to each of the plurality of modules.

A method for providing for data communication between a plurality of modules, the method comprising the steps of:

• (a) providing a physical layer implementation of a multi-bit interconnection topology within a plurality of integrated circuits, each of the plurality of integrated circuits including at least a one bit implementation of the interconnection topology;
• (b) connecting the plurality of modules to the physical layer implementation of the interconnection topology through point-to-point links implemented using interconnect drivers and interconnect receivers included within the plurality of integrated circuits and which provide an electrical interface between the physical layer implementation of the interconnection topology and the plurality of modules.