US 5,122,687 A · Symmetrical Exclusive-Or gate, and modification thereof to provide an analog multiplier

Abstract

An Exclusive-Or circuit has a symmetrical arrangement of components in order to provide an identical input impedance for both input signals and to provide identical switching and signal propagation times. The circuit includes input stages (EF.sub.1, EF.sub.2 ; EF.sub.3, EF.sub.4) for receiving first and second input signals (V.sub.E1 ; V.sub.E2) and emitter followers (EF.sub.5, EF.sub.6, EF.sub.7, EF.sub.8) connected to the input stages. A current switch stage (T.sub.11, T.sub.12, T.sub.13, T.sub.14) is driven by the input stage for the first input signal, and an identical current switch stage (T.sub.21, T.sub.22, T.sub.23, T.sub.24) is driven by the input stage for the second input signal. These current switch stages are connected by load resistors (R.sub.1, R.sub.1) to one pole of an operating voltage source (U.sub.B). Another current switch stage (T.sub.15, T.sub.16), is connected between a current source (I.sub.O /2) and the current switch stage (T.sub.11, T.sub.12, T.sub.13, T.sub.14) that is driven by the input stage for the first input signal, and another identical current switch stage (T.sub.25, T.sub.26) is connected between a further current source (I.sub.O 2) and the current switch stage (T.sub.21, T.sub.22, T.sub.23, T.sub.24) that is driven by the input stage for the second input signal. These current switch stages (T.sub.15, T.sub.16, T.sub.25, T.sub.26) are driven by the emitter followers (EF.sub.5, EF.sub.6 ; EF.sub.7, EF.sub.8) that are connected to the input stages. The current sources are connected to the other pole of the operating voltage source (U.sub.B). A buffer stage (EF.sub.9, EF.sub.10, EF.sub.11, EF.sub.12) connects the load resistors to a current switch (T.sub.8, T.sub.9) which provides the output signal (U.sub.A). An analog multiplier can be made by modifying this circuitry.

Claims19

Dependent claims

A circuit arrangement for Exclusively Or-ing first and second input signals, comprising:

a first input stage which receives the first input signal, the first input stage including at least one transistor and at least one diode;
at least one first emitter follower connected to the at least one diode of the first input stage;
a second input stage which receives the second input signal, the second input stage including at least one transistor and at least one diode;
at least one second emitter follower connected to the at least one diode of the second input stage;
a pair of current sources;
a first current switch stage connected to the first input stage;
a second current switch stage connected to the second input stage, the second current switch stage having circuitry identical to the first current switch stage;
another first current switch stage connected to the at least one first emitter follower, the another first current switch stage being connected between one of the current sources and the second current switch stage;
another second current switch stage connected to the at least one second emitter follower, the another second current switch stage being connected between the other of the current sources and the first current switch stage, the another second current switch stage having circuitry identical to the another first current switch stage;
and
at least one load resistance member connected to the first current switch stage and the second current switch stage.

8 more elements

A circuit arrangement for multiplying first and second input signals, comprising:

a first input stage which receives the first input signal, the first input stage including at least one transistor and at least one diode;
at least one first emitter follower connected to the at least one diode of the first input stage;
a second input stage which receives the second input signal, the second input stage including at least one transistor and at least one diode;
at least one second emitter follower connected to the at least one diode of the second input stage;
a first predistortion stage connected to the at least one first emitter follower, the first predistortion stage including at least one feedback resistance member;
a second predistortion stage connected to the at least one second emitter follower, the second predistortion stage including at least one feedback resistance member;
a pair of current sources;
a first current switch stage connected to the first predistortion stage;
a second current switch stage connected to the second predistortion stage, the second current switch stage having circuitry identical to the first current switch stage;
another first current switch stage connected to the at least one first emitter follower, the another first current switch stage including at least one feedback resistance member and being connected between one of the current sources and the second current switch stage;
another second current switch stage connected to the at least one second emitter follower, the another second current switch stage including at least one feedback resistance member and being connected between the other of the current sources and the first current switch stage, the another second current switch stage having circuitry identical to the another first current switch stage;
and
at least one load resistance member connected to the first current switch stage and the second current switch stage.

10 more elements

Dependencies are inferred from the claim text.

Symmetrical Exclusive-Or gate, and modification thereof to provide an analog multiplier

Life of this patent

Symmetrical Exclusive-Or gate, and modification thereof to provide an analog multiplier

Life of this patent

Abstract

Claims19