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US 5,121,407 AGranted
Spread spectrum communications system
AssigneePittway Corporation
InventorsAndrzej Partyka, Lee F. Crowley
Life of this patent
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AssigneePittway Corporation
InventorsAndrzej Partyka, Lee F. Crowley
Estimating the term…
A spread spectrum communication system for direct sequence transmission of digital information having a modulation format which is particularly suitable for indoor communication within residential, office and industrial structures. The modulation format combines BPSK or MSK spreading with FM carrier modulation by data bits and a carrier frequency shift whose magnitude is related to both a chip rate and a spreading sequence length. The carrier, chip clock and data clock are all synchronous and the sequence length is an integral submultiple of the bit length. The system reduces the frequency error between the transmitter chip clock and the receiver chip clock to permit the elimination of a code phase tracking loop in the receiver to reduce the receiver complexity. The receiver has an extended dynamic range which makes possible the reception of very strong signal without an automatic gain control loop (AGC) as well as reducing the time needed for code phase acquisition. The transmission system is highly resistant to CW jamming and short distance multipath effects.
A method of transmitting digital data, comprising the steps of:
A transmitter for transmitting digital data comprising:
A receiver for a spread spectrum signal comprising:
A system for transmitting and receiving digital data, comprising:
In a spread spectrum transmitter having a phase-lock loop for generating a carrier signal at a first frequency, said phase-lock loop including a voltage controlled oscillator having an output coupled to a frequency divider and an input coupled to an output of a phase detector, said phase detector having one input coupled to the output of said divider and a second input coupled to an output of a reference oscillator;
In a spread spectrum transmitter having a phase-lock loop for generating a carrier signal at a first frequency, said phase-lock loop including a voltage controlled oscillator having an output coupled to a frequency divider and an input coupled to an output of a phase detector, said phase detector having one input coupled to the output of said divider and a second input coupled to an output of a reference oscillator;
Dependencies are inferred from the claim text.